Core Temp 0.95 inaccurate core temperature readings?

Hi I'm new to overclocking and i'm trying to understand what my Tcase/Core temps are at.

Current Build: C2D E6400, Zalman CNPS9500, Asus P5N32e SLI plus, Antec 500w Neo HE psu, 2x1024mb Gskill DDR2-800, Asus 8800 gts 320mb

overclocked to 2.67ghz w/ ram at 667mhz

Core Temp .95 says my core temperatures are at about 68C while SpeedFan says they are at 53C.

RightMark CPU utility agrees w/ SpeedFan and says the cores are at 51C.

Nvidia Monitor agrees w/ SpeedFan on the Tcase temperature which is 58C.

has anyone had any problems w/ the readings from Core Temp (+15C). I know there is a sticky by GraySky that says SpeedFan is off by -15C but I cross check the Tcase temp which is 58C!

*temps are all during Orthos testing

any advice or information will be greatly appreciated, thanks!
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  1. Nas,

    After reading this thread AND all the Intel documents referenced in it, I have come to feel that CoreTemp is the way to read C2D temps and that talking about actual (as opposed to relative) temperatures on the C2D processors is to some extent meaningless and to a larger extent unnecessary. I'd highly advise you read through this and learn about the C2D Thermal Control Circuits and Digital Temperature Sensor. It'll take a few hours, but I found it worth it.

    I'll try to clarify how I understood things if you have specific questions.

  2. Grrrr my link didn't work. Here is the link.
  3. Quote:
    has anyone had any problems w/ the readings from Core Temp (+15C). I know there is a sticky by GraySky that says SpeedFan is off by -15C but I cross check the Tcase temp which is 58C!

    Well, Speedfan is off by 15 °C on a quad. I think it *should* detect the temps on a E6xxx okay since their constant is 85 whereas the quads use a constant of 100.

    Core temp = constant - DTS where the constant is either 100 or 85 depending on your processor.[/code:1:eebe29ac18]

    Measure it directly from the DTS yourself and calculate the temp from that formula; read [url=]this[/url] thread paying attention to uncleweb's instructions to read your DTS directly with crystalcpuid.

    On my Q6600: RMClock = Coretemp (0.95.3); Speedfan is off by 15 °C:

  4. As graysky mentioned, the DTS value is the thing to look at. When DTS = 0, the C2D's two Thermal Control Circuits kick in (if enabled, and one kicks in before the other, I think) to reduce CPU load and bring temps down. So the only thing that really matters is how far away you are from DTS = 0. CoreTemp provides a way to invert its reading of the DTS value and show the temperatures based on the formula graysky supplied.

    If you do want to use speedfan, and you can determine how far off speedfan is, there is an option in speedfan to apply an offset to any temp it displays. This allows you to bring speedfan into line with the DTS reading from coretemp.

    IMHO, using coretemp for C2D temp reads is the way to go, for it supplies the really important information - how far you are away from TCC engagment. Now, how far you should stay from TCC engagment is another matter, and I really don't have an answer to that one.

    One more thing, using TAT and crystalcpuid and coretemp is fun and instructive to see how it all relates and what happens as the TCC kicks in.
  5. Roadbeer69 Thank you for that incredibly informative thread. I could actually make some sense out of that. I've read the temperature guide here but never really grasped it all. One little downfall though... right now I'm getting great temps with TCC at 85C. If it turns out to be nearer to 100 it means my temps will be 15 degrees higher than what I have sofar believed to be true :cry: However I'm still far enough away from throttling so it's fine I guess.
    Anyways... thanks again.
  6. You're welcome morerevs - I felt the same way when I found the thread. As for where TCC is, I think I remember not being convinced as to what it might be for a C2D after reading that thread (which was almost a month ago). Coretemp has TCC at 85C for my E6700.

    I am not sure how much it really matters what TCC is, as long as you're temps are in line with what others report. If Intel needed it to throttle at 50C, then it would throttle at 50C and I'd assume "normal" operating temps would be well below that. It's all relative to TCC, and it doesn't really matter what TCC is. At least that's what I got out of the whole mess. :D
  7. Quote:
    Well, Speedfan is off by 15 °C on a quad. I think it *should* detect the temps on a E6xxx okay since their constant is 85 whereas the quads use a constant of 100.

    thanks roadbeer69 and graysky for your input. It seems that coretemp is reading a Tjunction temp constant of 100C on my C2D for some reason.. could this be reason to why the core temperatures are read +15C?

    maybe this screenshot will help:

    as you can see, other programs are all reading the core temperatures at about 15C cooler than CoreTemp. Is this because of the 100C constant?

    Thanks again for all your help guys!
  8. Nas,

    I think coretemp makes a guess at what "Tjunction" should be. As a side note, from what I've learned, Tjunctionis not an actual temperature on C2D desktop processors, and what people mean when the talk about tjunction is the TCC engagement temperature. So, for your processor, for whatever reason, it's guessing 100C. For my e6700, it's guessing 85C. My speedfan core temperatures and TAT core temperatures are fairly close to what coretemp reports. If coretemp placed "tjunction" at 100 for me, I'd be off 15C with speedfan and TAT temps, just like you are.

    Be cautious with any of the other temps reported by various programs (e.g. nvidia monitor), since I think a lot of programs don't read the DTS values. They read a temp value from BIOS, which is in turn an interpreted temp value read from a diode on the C2D. Because it's interpreted, different BIOS versions can report different temps. And because of the interpretation, and for other reasons (e.g. diode reads temp from only one spot on the die, while DTS is an indication of how many degrees there is till TCC kicks in, based on a sampling of temps over the entire C2D) the temp reported from BIOS is different than the temp reported by DTS.

    I'm not just pulling this all from my butt :wink: - make sure you read the thread and especially the Intel docs referenced in the thread.

    Finally, this all points to what I was trying to say earlier. It doesn't really matter what the absolute temp of your C2D is. Try not to think about it. What really matters is what the DTS value is, since DTS tells how far away you are from the point where the Intel engineers thought thermal control should kick in, which is the point where temps become dangerous. That's not to say you want to run near that point all the time, of course.

    I also realize you might want to use speedfan for fan control, so use speedfan's offsets to bring its temps in line with coretemp. But don't blame me if your machine blows up because I maybe I don't know what the hell I'm talking about! :wink: Please go through the Intel docs and that thread and verify what I'm saying here.

    By the way coretemp reports the DTS most accurately, which can be verified by using crystalcpuid to read the DTS from a register and compare it to coretemp. Coretemp also has an option to invert temp readings, meaning that the temps it displays are = "Tjunction" - DTS. Again, this doesn't say anything about absolute temps, but it doesn't really matter.
  9. To all. I kind of extracted what I thought to be the core of what was said in that 8 page thread. Proof read and maybe you can correct oversights or blatant errors. I'm trying to get everything in one place for people that also don't get the temp guide or might like to see a different approach to it.

    Thanks in advance!

    Case Temperature
    Intel thermal specs always references a case temperature (TC). this TC is defined as the temperature measured at the geometric center of the package on the surface of the IHS.

    X6800 TC = 60,4C
    C2D with 4MB L2 cache TC = 60,1C
    C2D with 2MB L2 cache TC = 61,4C

    The system bus signal PROCHOT# will go active when the processor temperature of either core exceeds its maximum operating temperature. This indicates the Thermal Control Circuit (TCC) has been activated. The
    temperature at which the PROCHOT# signal goes active is individually calibrated during manufacturing. Once configured, the processor temperature at which the PROCHOT# signal is asserted is not re-configurable.

    The processor will automatically shut down when the silicon temperature has reached its operating limit. At this point the system bus signal THERMTRIP# goes active and power must be removed from the
    processor. The temperature where the THERMTRIP# signal goes active is individually calibrated during manufacturing. Once configured, the temperature at which the THERMTRIP# signal is asserted is neither re-configurable nor accessible to the system.

    Intel defines tcase as the temperature measured at the geometric center of the ihs on top of the ihs surface! There is no temperature sensor nor a diode reporting this temperature. It's just a place outside the processor where temperatures may be measured ...

    Digital Thermal Sensor
    The Digital Thermal Sensor (DTS) is the on-die sensor to be used for fan speed control (FSC). Each core has its own DTS. The DTS is monitoring the same sensor that activates the TCC. Readings from the DTS are relative to the activation of the TCC. The DTS value where TCC activation occurs is 0 (zero).

    No matter what tool you are using, all these programs have to rely on sensors integrated within the cpu to measure temps. Intel supplies two ways to measure temps:

    1. The old fashioned thermal diode, readable via PECI interface

    2. Digital thermal sensor (dts, introduced with conroes), readable through registers.

    The problem is as follows:
    The thermal diode let's you read an absolute temperature BUT is not very accurate AND needs to be calibrated in order to show correct temps! Programs using this method will show slightly different readings depending how accurate the program developer calibrates his software.

    On the other hand, dts is very accurate. as intel has intended to use this sensor for fanspeed control, this sensor DOES NOT DELIVER ABSOLUTE TEMPERATURES! It gives a reading how far the core is away from the point where the cpu starts to throttle. All programs using this accurate sensor have to calculate absolute temps by subtracting dts readings from the mentioned throttling activation temperature.
    To make things even worse, intel did not supply this temperature value in any register as far as we know yet. Thus, software has to "assume" this temperature value and do the calculations.
    You can figure out for yourself the probability, the programmer hits the correct value just for your very own processor.
    This temperature value is burnt into the processor at manufacturing and may vary from die to die.
    As said before, this temperature value is not readable via any register.

    Core Temp
    As far as i know, thats the point where core temp kicks in. Core temp just reads two registers. The first one is the one which identifies CPU and Coretemp sets temperature where TCC gets activated accordingly, the second one is the register holding the DTS value itself. All that core temp has to do, is subtract the DTS value from TCC activation temperature to get current core temperatures. Core temp displays the TCC activation temperature as "Tjunction" and the actual temps of both cores under "Core #0" and "Core #1".
    So, as long as TCC is not activated (the cpu is not throttling) temps are below the 85C (or 100C depending on CPU type) coretemp shows as "Tjunction".

    The way coretemp works, throttling occurs at the point where one of the cores shows exactly the same value as is displayed as tjunction in coretemp. This might be any other value in programs reading their temperature off the thermal diode. I assume rmclock does so, as rmclock shows slightly different values than coretemp.
    However, nobody can tell if this temperature displayed in coretemp as 85c is actually 85c, 83c, 88c, or even near 100c (assuming coretemp is using the wrong tjunction)

    Most of the time PROCHOT# (TCC activation) temperature erroneously gets referenced as tjunction! Coretemp uses this TCC activation temperature as a reference point to calculate temperatures from. TCC
    activation temperature can't be read by software, BUT there is a bit in a register which was implemented by intel. This bit is valid on MOBILE processors and defines if TCC activation temperature is near 85c
    or near 100c! I use the term "near" because in reality, this temperature is calibrated on a processor basis and differs from die to die. On one processor die it might be 87c while on an other processor die
    it might be 83c, as stated before. Coretemp, and I assume all other programs using DTS, uses this bit to decide if for a certain processor 85c or 100c has to be used in the calculations. Although this is valid only for mobile processors, this seems to work for MOST current, but not all, desktop processors aswell. We have seen more and more new processors coming out where this assumption is not correct anymore. Those are the situations where coretemp reads temps about 15c off!
    So, to get coretemp back to more valid readings, the only thing to do is to change the reference temp from 85c to 100c instead on relying on the obviously wrong set bit in the register. That was done in coretemp 0.95 for e4300 and maybe some other processors too (e6400?).
    However there seem to be different (older) batches of e4300's (and possibly others) floating around that use 85C as TCC. As Coretemp 0.95 now assumes "Tjunction" = 100C, temps are again off by 15 degrees.

    what is a safe dts value?

    Well, as with regular coretemp readings this depends on the environment your processor is running in. My very personal rule is as follows:
    Running on high vcore, which to me is everything above 1.5v, I would try to keep dts above 30c (this translates to about 55c in coretemp94)
    On lower vcore, a dts value above 15c should be fine and easily achievable. (70c in coretemp94)
    These assumptions take into account that higher vcore results in higher current and thus in higher current density which besides temperature is the most important parameter for reliability or failures due to electromigration. Reducing operating temperatures maintains reliability even if current density (vcore) is raised.
    The general rule is roughly: decrease temps by at least 20c for every current density increase of 100%!
    Remember, regardless if "Tjunction" in Coretemp is set to 85C or 100C, DTS values reflect how far away from throttling/overheating your CPU is, so this is the only absolute value you can go by.

    All this is taken from the original thread here: So props to them!
  10. lol man this stuff is way more confusing than i first assumed.

    So with some of the newer c2d processors, coretemp sets the tjunction temp at 100C because TCC kicks in at that temp? if this is so, what would be a good detla to tjunction temp to have during orthos testing?

    thanks again for your input guys!
  11. From what I understand the delta depends on how much voltage you're running. The higher the voltage, the larger the delta needed to negate the negative effects of electromigration and to ensure stability. One guy (Unclewebb?) stated getting less stable during Orthos the closer he got to TCC, so that would be a good indication of a too low delta. One conservative estimate was 30C away from TCC but TBH in the old way of thinking with TCC @ 100 this would be around 70C (@load) which just feels hot :D So I'm not sure if I'm willing to embrace that just yet. However these guys were talking about high OC's and as such were willing to make temp sacrifices. The best thing still is to keep temps as low (or as far away from TCC) as possible.
    Here's a quote from the other thread:

    If vcore is increased, current flow increases and thus does current density. Double the currentdensity requires 20c lower temps to NOT run into increased electromigration! Currently i'm running a vcore of 1.50v and coretemp 0.94 (unfortunately 0.95 fails on my system) reads 50c to 55c under full load. This would translate to a dts reading in the range of 30c to 35c and seems sufficient to me.

    It all depends on how safe you want to play it and if you care about CPU lifetime :P

  12. Is a bit confusing... I'd recommend that you email the author of coretemp with your problem and screenshot. He just updated to version 0.95.3 which fixes a major crashing bug for some users. You can manually set speedfan to adjust the temp by 15 °C by the way,
  13. I downloaded CoreTemp .94 and what i get is exactly the readings i have w/ my other programs. CoreTemp .94 sets my Tjunction temp and 85C rather than 100C and my core temperatures for 0 and 1 are both 15C cooler than w/ CoreTemp .95 ...

    I'm going to assume it's just a software problem as my system runs fine w/o any hangs or throttling during intense gaming :)

    i'm currently only running 1.325V on the vcore and CoreTemp .94 tells me at idle core 0 and 1 are at between 25-28C which matches up w/ the other programs!

    once again thanks for all your generous help and knowledge :D
  14. The difference in temps comes from changes in Coretemp 0.95. Apparently the author changed Tjunction values for e4300 and e6400 (and maybe others.. QUADS??) to 100C, so that's where your 15C ofset comes from. In either case your delta to throttling would still be 32C @ load (100-32=68 in 0.95 vs 85-32=53 in0.94) which is considered safe. But I can understand wanting to believe the lower values, I choose to do the same :D
  15. morerevs, thanks for taking the time to distill that thread!

    However, I'm still foggy on the subject of how far away you should keep your temps from TCC engagment (DTS = 0). I now what the 1 guy was saying in the thread, but I'm not sure where he was getting it from, though he's probably got the essence of it right. It's just he threw some real specific figures up, and I'd like to understand where he got them.

    In any case, I am trying to find stable OCs on my system now. If I don't get max life from the CPU, oh well, C2Ds are cheap. Once you get started on a serious OCing effort, the tendency is to push it as far as you can (paraphrased quote from Fear And Loathing In Las Vegas: Doctor Gonzo: Once you get locked into a serious drug collection, the tendency is to push it as far as you can)

    Nas, remember, don't worry too much about actual/absolute temps. Use that coretemp temp inversion option and have the temps displayed as degress C from TCC engagement, and you'll be fine.
  16. oh, by the way, if no one has pointed this out, but the latest version of orthos automatically does dual core, so all you have to do is run it and it will make its own 2 threads... and also, with orthos, select gormacs core, tends to be a little more stressful.
  17. You can get an idea of what your correct temps are this way, since the TCC is a guess.

    1. Go into your BIOS and save your configuration.

    2. Set a low power config with FSB 200, lowest multiplier, lowest vcore you can. The idea is to put as little heat through the chip as possible.

    3. Download crystal cpuid;

    4. In CPUID, run Function/MSR Editor and enter 0x19c in the MSR number box - this is the register for the DTS sensor - it directly reads the DTS off of the core.

    5. click the RDMSR button - In my case I get a value under EAX of 0x88370000 at idle (e6600 @ 3.2).

    6. Take the last 2 chars before the 0's (37) and enter this Hex number into the Windows scientific calculator. Click the hex option, enter 37, and click the Dec option. You get 55. You subtract this value from the probable TJunction point, 85C and get a core reading of 30C.

    Given the low power settings you made in your BIOS, the temperature should be very close to ambient. If a TCC of 85C less the value in pt. 6 gives you a temp close to ambient, then you have the best possible idea of what your correct temps are. If not, plug in a TCC of 100C - see if that makes sense.
  18. This has got to be the best thread I have seen in this forum on temperature (and the related threads on other forums). I have been trying to understand the temps reported by different software on different boards/processors.

    The instructions from bh626pro were great!! A few follow-up questions;
    Any reason you shouldn't use this same process for determining dts under full load?
    Also, morerevs, indicated there are two dts on each C2D.
    Each core has its own DTS. The DTS is monitoring the same sensor that activates the TCC.

    That being the case, blh626pro provided the following;
    4. In CPUID, run Function/MSR Editor and enter 0x19c in the MSR number box - this is the register for the DTS sensor - it directly reads the DTS off of the core.

    Is the 0x19c for Core 0 or Core 1? Would anyone have the register/address for the other?

    Thanks to all - great stuff (especially for this newbie)
  19. Quote:
    Any reason you shouldn't use this same process for determining dts under full load?

    No. It will measure temps at any load, doesn't matter.
    Is the 0x19c for Core 0 or Core 1? Would anyone have the register/address for the other?

    Choose the core by using the drop down in the right hand corner of Crystal CPUID...

    Concerning the TJunction, here an Intel engineer says there is no way to determine whether it is 85C or 100C - hence my suggestion to measure temps at a low power level set in the bios...

    Some steppings of the mobile Intel® Core™2 processor do indicate Tj to be approximately 85 or 100 via a single bit in the EXT_CONFIG register (msr 0EEh) but desktop, workstation and server processors do not. Nor is there a register implemented in those processors that software can read to get the Tj value for either the Pentium® 4 processor, Intel® Xeon® processors or Intel® Core™2 processors.
  20. Thank you, thank you, thank you.

    This is THE most informative and well constructed post I've read on this subject. I've been pulling my hair out trying to determine what appropriate temperatures are and whether I am just pushing my CPU too hard. I only have a Zalman CNPS7000 cooler, but wanted to at least push to get what I could out of this CPU safely.

    I've managed to reach 3.4GHz with my E6850 @1.34V with max delta to Tjunction = 28C (using Orthos). This makes me more relieved, based on the info provided here. However, TAT pushes it to about 22C, but that program seems so extreme, completely unrealistic. Granted it will find any instability in your system. I'm happy with 3.4GHz as that is a full GHz more than my E6600.

    By raising my Vcore above 1.35 it seems my temps exponentially increase. Just bumping to 1.40v seems to increase temps by 5-6C.

    It sounds like I could even safely push to about 15C Delta while understanding I'd lessen the life of my CPU, which of course is OK considering I only keep a CPU for no more than two years, usually less than that. Also that most of the time the PC won't be stressed 100% anyhow.

    Anyone know where I can get CoreTemp 0.95.3? It seems that the latest on the Core Temp Site is just 0.95. Thanks.
  21. Is indeed a good thread full of information. I had a query that after reading this has satisfied me.

    What I would like to know is thoughts on my temps...I've never seem them soo low in TAT. I was running a E4300 @ 2.7, I just put a E6750 in & against my usual methods I put a simple thick strip of paste down the center of the cpu. My temps thru TAT are 12-15 degrees. I used coretemp too which was the same, it was the Tjunction @ 85 which I was wondering about.

    These seem very low, my E4300 was 31 degrees or so. Under load my E6750 goes to 22. Am I just lucky or dodgey readings?
  22. From reading a few other posts, it seems the E6x50 have a Tjunction of 100. The software reading the temps is assuming an 85c Tjunction. Therefore, just add 15c to the core temps.
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