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Possible explanation for AMD's low yield on 65nm?

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October 11, 2007 6:39:11 PM

http://www.edn.com/index.asp?layout=blog&blog_id=1690000169&blog_post_id=470015647

Quote:

To start with, a few things are known. Intel appears to be further along toward production with a real 45nm process than anyone else. They also appear to be getting far better results, in terms of power-performance and yield, on 65nm than almost anyone else—certainly better than AMD, which rumor says is in serious trouble over 65nm yields and is not finding its way out.


It raises an interesting point in the article. Intel does their fabrication process in house, that is, they develop, implement, optimize, fix all in one fabrication plant. After that, the entire process is copied exactly to other fabs. This practice is known as "copy exact". Since Intel limited the variables in the fabrication process, the chance of having different yield between fabs are also limited.

On the other hand, AMD bought their fabrication process from IBM. However, since yield can be affect, and sometimes significantly, if the environment is not "exact". For instance, humidity itself can cause serious yield affect. As a result, during the transfer process from IBM's East Fishkill to AMD's Dresden, AMD needs to optimize the process to be used in Dresden. This takes enormous amount of time and resources.

Given that Barcelona is a hard die to yield in the first place, AMD also needs to optimize the process again to accommodate such complex logic circuitry. This all happens after the mass production, so I'm not sure if AMD is actually making money on the Barcelona, if at all. I'm sure AMD's yield will improve over time, but I'm skeptical about if they can optimize it enough before they bled out of cash. Afterall, they also need to work on Barcelona's clockspeed.
October 11, 2007 8:40:23 PM

This is just asking for one angry BM.....oh no.....
(on second thought, do it!.....*sits back to watch the carnage*)
October 11, 2007 8:43:05 PM

Repost:

This is the powerpoint slide AMD presented back on Technology Analyst Day, which was in July. All the information on here could change after three months, but I don't expect big changes.



Notice the defect density of 0.5cm^2

Now, here is the function that calculate the yield from defect density.

http://smithsonianchips.si.edu/ice/cd/CEICM/SECTION3.pd...

Go to page 7, figure 3.9, and line up 0.5cm^2 defect density with the curve.
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October 11, 2007 9:41:59 PM

I read that the 65nm "leaks" a lot at higher speeds. That's why AMD doesn't offer the high end model in 65nm, like the 6000+. Simply put, the 90nm is more efficient than the 65nm at higher speeds.

http://www.techpowerup.com/index.php?35743

Oh and please refrain from posting unhelpful comments, it's a waste of space really.
October 11, 2007 10:18:31 PM

I suspect that aside from the cherry picked ones, the majority of AMD's processors are only limited to 2.8Ghz, before significant leak begins. Compared to Intel's bulk designs, AMD's SOI process is a lot more leaky.

From what I know, SOI actually helps where leaks the least. So as you can see, even without SOI, Intel's Core 2 is significantly less leaky than some of the X2. Also, as the node gets smaller, SOI's affect on leakage also gets smaller. I wouldn't be surprised if IBM / AMD dump SOI at 45nm node.
October 11, 2007 11:06:38 PM

yomamafor1 said:
Repost:

This is the powerpoint slide AMD presented back on Technology Analyst Day, which was in July. All the information on here could change after three months, but I don't expect big changes.

http://www.iian.ibeam.com/events/thom001/22876/browser/slides/20070726084721294707/default_large/Slide158.JPG

Notice the defect density of 0.5cm^2

Now, here is the function that calculate the yield from defect density.

http://smithsonianchips.si.edu/ice/cd/CEICM/SECTION3.pd...

Go to page 7, figure 3.9, and line up 0.5cm^2 defect density with the curve.



Here is a quote from that paper - which btw is from the 90s.

Each semiconductor manufacturer has its
own methods for modeling and predicting
the yield of new products, estimating the
yield of existing products, and verifying suspected
causes of yield loss. A variety of yield
models, including Murphy’s, Poisson’s, and
Seeds’ model, as well as the newer negative
binomial model, can be used to estimate
yield from defect density and die size. In
comparison (Figure 3-8), each model has a
different way of accounting for the distribution
of defects on a wafer. The negative binomial
model accounts for particle clustering
on wafers. Unfortunately, this model is also
one of the most difficult to use.
Oftentimes, several yield formulas are
implemented within a particular company
(e.g., MurphyÕs model for memory, SeedÕs
model for gate arrays, etc.). Ultimately, each
modelÕs merit can only be judged by how it
performs when compared to actual yields

(i.e., there is no universal model).



What that says is that this is not a determinant by a guide. Maybe you should find something that has other than DRAM. No one is doubting you, we're just saying that it's doubtful that AMD is only getting 3 fully-functional cores out of 10.

For the guy in that article to mention a rumor without saying who started it is bad journalism.


As far as why AMD hasn't released higher speed Brisbane, I would say it's because they CAN'T stop making 90nm chips. Also, they have only 8 SKUs (Turion and Athlon) at 65nm, while they have around 30 on 90nm, including Opteron. So just like PD was the majority of Intel's stock for so long, it will take awhile to ramp Fab 38 and have all 65nm lines.


Also, when you line up the lines for defects which curve do you use? There are several different curves. As I said before NONE OF THEM ARE CPUs, BUT DRAM. It also has no determinant for transistor size. And when you look at the slide you see that AMD says 1000 wafer starts for MATURE YIELD. I don't think 30% is mature yield and they have definitely released 1000 wafers worth Barcelona as with 60% yield for the current bins, that means with ~215 chips per die, 215 x .6 = 129 so if you assume there are 100,000 Barcelona's out there, they would have done a little less. AMD probably calls MATURE YIELD 70% so again the slide says they are NOT at 30% yield at THIS POINT. That doesn't even include the wafer starts for B0.
October 12, 2007 12:02:24 AM

BaronMatrix said:
Here is a quote from that paper - which btw is from the 90s.

Each semiconductor manufacturer has its
own methods for modeling and predicting
the yield of new products, estimating the
yield of existing products, and verifying suspected
causes of yield loss. A variety of yield
models, including Murphy’s, Poisson’s, and
Seeds’ model, as well as the newer negative
binomial model, can be used to estimate
yield from defect density and die size. In
comparison (Figure 3-8), each model has a
different way of accounting for the distribution
of defects on a wafer. The negative binomial
model accounts for particle clustering
on wafers. Unfortunately, this model is also
one of the most difficult to use.
Oftentimes, several yield formulas are
implemented within a particular company
(e.g., MurphyÕs model for memory, SeedÕs
model for gate arrays, etc.). Ultimately, each
modelÕs merit can only be judged by how it
performs when compared to actual yields

(i.e., there is no universal model).



What that says is that this is not a determinant by a guide. Maybe you should find something that has other than DRAM. No one is doubting you, we're just saying that it's doubtful that AMD is only getting 3 fully-functional cores out of 10.

For the guy in that article to mention a rumor without saying who started it is bad journalism.


As far as why AMD hasn't released higher speed Brisbane, I would say it's because they CAN'T stop making 90nm chips. Also, they have only 8 SKUs (Turion and Athlon) at 65nm, while they have around 30 on 90nm, including Opteron. So just like PD was the majority of Intel's stock for so long, it will take awhile to ramp Fab 38 and have all 65nm lines.


Also, when you line up the lines for defects which curve do you use? There are several different curves. As I said before NONE OF THEM ARE CPUs, BUT DRAM. It also has no determinant for transistor size. And when you look at the slide you see that AMD says 1000 wafer starts for MATURE YIELD. I don't think 30% is mature yield and they have definitely released 1000 wafers worth Barcelona as with 60% yield for the current bins, that means with ~215 chips per die, 215 x .6 = 129 so if you assume there are 100,000 Barcelona's out there, they would have done a little less. AMD probably calls MATURE YIELD 70% so again the slide says they are NOT at 30% yield at THIS POINT. That doesn't even include the wafer starts for B0.


Why is it so hard to admit the yields are low? It is evident across their entire 65nm lineup; they aren't being binned at high clock speeds, period. AMD just stated their parts won't hit 2.8 till next quarter if they are lucky. If you take into account the late launch and sub par performance (in the sense it didn’t meet AMD's claim to fame), there is a real issue with their 65nm node.

But regardless of that fact why do you care so much it’s a node for bloody sakes, you beloved company can't deliver their endless technological advancements because of a process node. I fail to see why you guys are so hung up on the issue they will resolve it just when is still up in the air.

It should be also noted the K8L is a very large processor similar to the Prescott in terms of overall complexity it's a fairly easy to see the issue at hand. 65nm isn’t all that friendly and neither will 45nm or 32nm which is where 90% of the semiconductor industry will stop well I don’t see many getting past 45nm but that’s neither here no there just my personal opinion. Anyways AMD will need to do some substantial redesigns to the K8L similar to Intel’s last revision of the Xeon line, pretty sure it was called Dempsey but I could be mistaken. Otherwise I don’t see it breaking 3.0 without drawing 150watts+ or in other words AMD's version of the Prescott, got to admit though if you didn’t see this coming, I can see how some of you guys are kind of growly about the situation.

But really tri-core it’s telling you something that for some odd reason you aren’t receptive to hearing and when you take into account speed bins its even more compelling argument.

But for anyone interested anything above 80% yield is pretty godly and not very common, the only node that I have ever heard of being in that range is Intel’s .13 micron node, so take the sweet yield comments with a grain of salt fellas they are all sitting around 40-60% I would bet my 1st born child on it.

Word Playa.
October 12, 2007 12:51:28 AM

For me its fairly obvious we have no real clue what yields AMD has ;-) Its quite probable yields are (were?) low, but IMO it has more to do with complex new core than 65nm. Why? Because AMD presumably has good yields of X2 and radeon family and chipsets. Its not like 65nm process is new and unfamiliar for AMD.

Its obvious ironing out K10 core took way longer than anticipated due to complexity and lack of high funding, which isnt an issue for the Intel, still new stepping seems to solve most of the issues and IMO yields arent that bad atm and will only improve. I just hope ramping up will be fast enough to keep up on intels toes, otherwise we as consumers will be in trouble.
October 12, 2007 1:35:42 AM

I have a very good clue that AMD's yields are, direct from Paul, himself.

I will not report numbers. I like my job. However, if intels defect densities (NOT yields) are where AMD's have been published, to produce roughly the same number of viable chips at full factory loads, intel would have to build 2 new fabs. Intel currently has 3.5 fabs producing 65nm. Do the math.

Now, this is for BM -- the yield curve stuff you're talking about only deals with "defects per area" -- so the idea that it's talking about DRAM vs. Logic is irrelevant. So is the fact that it's from the 90's. It's an industry standard today. You have a point in that there are any number of different statistical methods of estimating a defect distribution, but these things generally give rise to the same order of magnitude answer.

I have no doubt that AMD is better than most on the issue of defects. These problems are just that hard. This is also precisely why intel didn't go down the road of a monolithic quad. Yields tank at the same defect density level.
October 12, 2007 1:46:34 AM

I enjoy reading the informative constructive criticism of most peoples posts in topics such as this. But when people post to simply insult others intelligence and be a "naysayer" without any intelligent response to the information put before them its a complete waste.
October 12, 2007 6:22:24 AM

chookman said:
I enjoy reading the informative constructive criticism of most peoples posts in topics such as this. But when people post to simply insult others intelligence and be a "naysayer" without any intelligent response to the information put before them its a complete waste.


If you don't like a good flamewar, you are on the wrong forum.
October 12, 2007 8:27:35 AM

@sirrobin4ever
Im not ribbing the flamwar at all. Only the comments from jstall that do nothing to add to the thread
October 12, 2007 8:46:00 AM

If anyone's interested:
http://www.vr-zone.com/articles/AMD_Extends_Athlon_X2_%...

Anthlon64x2 5600+(2.9ghz) brisbane, 65nm, 65w
due Oct 07

"Why is it so hard to admit the yields are low? It is evident across their entire 65nm lineup; they aren't being binned at high clock speeds, period. AMD just stated their parts won't hit 2.8 till next quarter if they are lucky. If you take into account the late launch and sub par performance (in the sense it didn%u2019t meet AMD's claim to fame), there is a real issue with their 65nm node."

I guess they got lucky

October 12, 2007 8:49:06 AM

So far, their has only been one reply that has any credence...

Thanks, Spud, glad you dropped in.
a b à CPUs
October 12, 2007 9:14:34 AM

I am a blatant AMD Fanboi ... I make no apologies.

I didn't mind Yomama's post and don't consider him a troll ... till I read the X3 Toliman thread and realised he is just starting another flamewar.

I still can't find the reference I wanted to add which focussed on a possible issue with SOI ... the article talked about the insulating characteristics possibly being an issue with the removal of heat from the core ... as opposed to Intel's approach.

Can someone comment on this please ... without the troll references if possible?

My P4 and X2 boxes here are still talking to each other on my network ... lol

October 12, 2007 9:53:35 AM

Reynod said:
I am a blatant AMD Fanboi ... I make no apologies.

I didn't mind Yomama's post and don't consider him a troll.

He raises point's I am interested in.

I tend to like MB's style because I can understand his points ... plus he pulls out the reference material.

I still can't find the reference I wanted to add which focussed on a possible issue with SOI ... the article talked about the insulating characteristics possibly being an issue with the removal of heat from the core ... as opposed to Intel's approach.

Can someone comment on this please ... without the troll references if possible?

My P4 and X2 boxes here are still talking to each other on my network ... lol


Rumour has it that AMD are increasing the thickness of the metal in their gates by about 25% to reduce leakage in their 65nm process... But that's just a rumour.
October 12, 2007 3:49:58 PM

Evilonigiri said:
I read that the 65nm "leaks" a lot at higher speeds. That's why AMD doesn't offer the high end model in 65nm, like the 6000+. Simply put, the 90nm is more efficient than the 65nm at higher speeds.

http://www.techpowerup.com/index.php?35743

Oh and please refrain from posting unhelpful comments, it's a waste of space really.



If you read that carefully it clearly says IT'S MOSTLY BECAUSE OF SHRINING THE ARCH. I said that before and people didn't listen. Brisbane has nothing o do with BARCELONA. Barceloa was designed for 65nm and takes into account leakage. The dual stress liners and memorization will work better for K10 than K8 as they were designed for NATIVE 65nm archs not shrinks from 130nm - 90nm - 65nm.
I expected that Brisbane would not be indicative of the transistor perf of AMDs 65nm process. But then I may be spreading FUD.
October 12, 2007 3:58:02 PM

Why is it so hard to admit the yields are low? It is evident across their entire 65nm lineup; they aren't being binned at high clock speeds, period. AMD just stated their parts won't hit 2.8 till next quarter if they are lucky. If you take into account the late launch and sub par performance (in the sense it didn’t meet AMD's claim to fame), there is a real issue with their 65nm node.


Again, the article states that BRISBANE NOT BARCELONA is having problems becasue it's an OPTICAL SHRINK and NOT a 65m design.

THAT'S WHAT I'M SAYING.

I realize that a transistor is a transistor, but AMD says 1000 wafer starts to mature yields. That is sligty misleading as it doesn't say for which stepping, but I would assume they mean the shipping stepping.

If so then BA was the shipping one and B2F is supposedly Phenom. B3 has been reported by Digitmes to be in testing now so I would say that they are very near to MATURE YIELDS OF ~ 70% or more.

PERIOD!!!

Though of course I've never been to Fab 36 so take it as you will.
October 12, 2007 4:05:55 PM

spud said:


But for anyone interested anything above 80% yield is pretty godly and not very common, the only node that I have ever heard of being in that range is Intel’s .13 micron node, so take the sweet yield comments with a grain of salt fellas they are all sitting around 40-60% I would bet my 1st born child on it.

Word Playa.


Nice to see you again Spud. Its been a while. Where have you been? Also, congratulation on your 1st born child. :D 


Word Playa.
October 12, 2007 4:07:12 PM

Reynod said:
I am a blatant AMD Fanboi ... I make no apologies.

I didn't mind Yomama's post and don't consider him a troll ... till I read the X3 Toliman thread and realised he is just starting another flamewar.

I still can't find the reference I wanted to add which focussed on a possible issue with SOI ... the article talked about the insulating characteristics possibly being an issue with the removal of heat from the core ... as opposed to Intel's approach.

Can someone comment on this please ... without the troll references if possible?

My P4 and X2 boxes here are still talking to each other on my network ... lol


I saw this somewhere. Give me a day, I'll find the links.
October 12, 2007 4:08:18 PM

kpo6969 said:
If anyone's interested:
http://www.vr-zone.com/articles/AMD_Extends_Athlon_X2_%...

Anthlon64x2 5600+(2.9ghz) brisbane, 65nm, 65w
due Oct 07

"Why is it so hard to admit the yields are low? It is evident across their entire 65nm lineup; they aren't being binned at high clock speeds, period. AMD just stated their parts won't hit 2.8 till next quarter if they are lucky. If you take into account the late launch and sub par performance (in the sense it didn%u2019t meet AMD's claim to fame), there is a real issue with their 65nm node."

I guess they got lucky



I'd say this means it looks real good for Kuma to reach 3.4GHz as was reported at Fudzilla. And like you said I guess they got lucky. Maybe they have Intel building those. :pt1cable: 

Maybe they're actually the number 2 CPU manuf in the world and have the same tools that Intel does and get their engrs and material scientists from the same schools. They're just in the ring with an 80lb gorilla.
October 12, 2007 4:11:03 PM

BaronMatrix said:
Again, the article states that BRISBANE NOT BARCELONA is having problems becasue it's an OPTICAL SHRINK and NOT a 65m design.


Makes sense. AMD's 65nm may be more mature now with a native 65nm design. However, I think yields are probably actually WORSE because of the increased complexity and caches of the Barcelona chips.

Pure speculation: I don't think we're going to see four barcy cores over 2.5ghz anytime some. I think we might see some tri-cores approaching 2.5, and we could see some duals at 2.5ghz and slowly getting beyond it.


This is where AMD's insistence on a native quad-core is really hurting them, they just can't do it on a new 65nm process.
October 12, 2007 4:12:15 PM

kpo6969 said:
If anyone's interested:
http://www.vr-zone.com/articles/AMD_Extends_Athlon_X2_%...

Anthlon64x2 5600+(2.9ghz) brisbane, 65nm, 65w
due Oct 07

"Why is it so hard to admit the yields are low? It is evident across their entire 65nm lineup; they aren't being binned at high clock speeds, period. AMD just stated their parts won't hit 2.8 till next quarter if they are lucky. If you take into account the late launch and sub par performance (in the sense it didn%u2019t meet AMD's claim to fame), there is a real issue with their 65nm node."

I guess they got lucky


Great. At least on the dual core side, AMD is covered. I don't think AMD will attempt to mass release Kuma, because the margin in that sector is so low, its not economical. I suspect Kuma will be released like 2900Pro, only in limited quantities.

Now let's see if they can do it on the quad core side.
October 12, 2007 4:20:17 PM

croc said:
Rumour has it that AMD are increasing the thickness of the metal in their gates by about 25% to reduce leakage in their 65nm process... But that's just a rumour.


I've talked to another person on other forums, and he confirmed this. He basically emailed the author of that article, and asked if it was true.

So yes, I believe its a fact now, and its pretty evident too. The reason why Barcelona can maintain such low TDP with complex design is because AMD thickened the gates to reduce leakage. However, now they have a hard time bumping up the frequency, because the current now has to take longer time to pass through the gate.

I guess AMD has developed new stressing agent and techniques, as 2.6~2.7Ghz Barcelona apparently are in the fabs now. And no, I doubt Barcelona can get to 4.0Ghz with B3 revision. I'll be surprised if they can reach 3.2Ghz, before resorting to 45nm and HK/MG.
October 12, 2007 4:23:37 PM

Jstall, no offense, but scientia is a fanboy. He was more neutral back then, but now he just deletes the posts that present facts to counter him.

A more knowledgeable blog would be this:
roborat64.blogspot.com

You'll find a great deal of knowledgeable posters there.

As for Ou's blog, you need to sort out the inflammatory comments in his reply sections.

October 12, 2007 5:35:11 PM

TechnologyCoordinator said:
Makes sense. AMD's 65nm may be more mature now with a native 65nm design. However, I think yields are probably actually WORSE because of the increased complexity and caches of the Barcelona chips.

Pure speculation: I don't think we're going to see four barcy cores over 2.5ghz anytime some. I think we might see some tri-cores approaching 2.5, and we could see some duals at 2.5ghz and slowly getting beyond it.


This is where AMD's insistence on a native quad-core is really hurting them, they just can't do it on a new 65nm process.



And I respectfully disagree. I think they will release the 2.6Ghz Barc this year and a 2.6GHz Phenom this year. They have been demoing a 3GHz Phenom for more than a month now. Anand did receive a 2.5GHz BA rev and AMD is now onto the B2F one. If B3 succeeds in testing, then we may see 3GHz early next year. it's no rush though cause the Skulltrail 3.2GHz 45nm High-K chips are still pumping a SERIOUS 150W EACH.


Will you at least admit that the slide said mature yields after 1000 wafer starts? At the 30% that guy quoted (saying yo mama is uncool) that would be 215 x .3 = 64 chips per die. If there are 64000 Barcelonas around they have reached mature yield which is usually ~70% for AMD and Intel.
October 12, 2007 5:50:33 PM

BaronMatrix said:
And I respectfully disagree. I think they will release the 2.6Ghz Barc this year and a 2.6GHz Phenom this year. They have been demoing a 3GHz Phenom for more than a month now. Anand did receive a 2.5GHz BA rev and AMD is now onto the B2F one. If B3 succeeds in testing, then we may see 3GHz early next year. it's no rush though cause the Skulltrail 3.2GHz 45nm High-K chips are still pumping a SERIOUS 150W EACH.


Will you at least admit that the slide said mature yields after 1000 wafer starts? At the 30% that guy quoted (saying yo mama is uncool) that would be 215 x .3 = 64 chips per die. If there are 64000 Barcelonas around they have reached mature yield which is usually ~70% for AMD and Intel.



I didn't see the slide, so I am unable to comment on it. I'm not good at all that super technical stuff.

We'll have to see Baron. We both speculate differently. I speculate that Phenom will be paper launched late December and no actual processors will ship until mid-January. I expect quad-core launch speeds to be between 1.9 and 2.2. I don't think the server side will see too many new models. Maybe they'll get up to 2.2 by the end of the year, in my humble opinion.

We'll have to wait and see who is right
October 12, 2007 6:01:37 PM

yomamafor1 said:
I've talked to another person on other forums, and he confirmed this. He basically emailed the author of that article, and asked if it was true.

So yes, I believe its a fact now, and its pretty evident too. The reason why Barcelona can maintain such low TDP with complex design is because AMD thickened the gates to reduce leakage. However, now they have a hard time bumping up the frequency, because the current now has to take longer time to pass through the gate.

I guess AMD has developed new stressing agent and techniques, as 2.6~2.7Ghz Barcelona apparently are in the fabs now. And no, I doubt Barcelona can get to 4.0Ghz with B3 revision. I'll be surprised if they can reach 3.2Ghz, before resorting to 45nm and HK/MG.



The problem is not clock speed, it's power. 3.2GHz Harpertowns(45nm) are still drawing 150W.
a b à CPUs
October 12, 2007 6:40:00 PM



It raises an interesting point in the article. Intel does their fabrication process in house, that is, they develop, implement, optimize, fix all in one fabrication plant. After that, the entire process is copied exactly to other fabs. This practice is known as "copy exact". Since Intel limited the variables in the fabrication process, the chance of having different yield between fabs are also limited.

On the other hand, AMD bought their fabrication process from IBM. However, since yield can be affect, and sometimes significantly, if the environment is not "exact". For instance, humidity itself can cause serious yield affect. As a result, during the transfer process from IBM's East Fishkill to AMD's Dresden, AMD needs to optimize the process to be used in Dresden. This takes enormous amount of time and resources.

Given that Barcelona is a hard die to yield in the first place, AMD also needs to optimize the process again to accommodate such complex logic circuitry. This all happens after the mass production, so I'm not sure if AMD is actually making money on the Barcelona, if at all. I'm sure AMD's yield will improve over time, but I'm skeptical about if they can optimize it enough before they bled out of cash. Afterall, they also need to work on Barcelona's clockspeed.

_________________________________________________________________________________________
The context of the article is that of an opinion piece rather than that of factual analysis into Intel's or AMD's fabrication process. And, if you literally interpret the article in that context, then all the thrust of the article is clearly stated in the last paragraph with, "Intel worked out that a severe restriction of the design space would have substantial advantages on today’s processes". To directly link this article back to how or why AMD may or may not be getting low Barcelona yields is a matter of speculation and assumption.

October 13, 2007 2:34:46 AM

BaronMatrix said:
The problem is not clock speed, it's power. 3.2GHz Harpertowns(45nm) are still drawing 150W.


Please provide a link for this.

3.2 Harpertown has a TDP of 120W. With a 2.0 - 3.0GHz all speced @80W, I find it hard to believe that the 3.2 gets anywhere close to 120W, (it just has to be over 80W).

Now, the 3.2 Tulsa IS 150 W. But that's netbust, IIRC.

Codename Model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (Watts)
Harpertown X5482 3.2 12 1600 120
E5472 3.0 80
E5462 2.8 80
X5460 3.16 1333 120
E5450 3.0 80
E5440 2.83 80
E5430 2.66 80
E5420 2.5 80
E5410 2.33 80
E5405 2.0 80
Harpertown LV L5430 2.66 50
L5410 2.33 50
Wolfdale-DP E5272 3.4 6 1600 80
E5260 3.33 1333 65
E5205 1.86 1066 65
Wolfdale-LV L5250 3.16 1333 40
October 13, 2007 3:34:01 AM

BaronMatrix said:
And I respectfully disagree. I think they will release the 2.6Ghz Barc this year and a 2.6GHz Phenom this year. They have been demoing a 3GHz Phenom for more than a month now. Anand did receive a 2.5GHz BA rev and AMD is now onto the B2F one. If B3 succeeds in testing, then we may see 3GHz early next year. it's no rush though cause the Skulltrail 3.2GHz 45nm High-K chips are still pumping a SERIOUS 150W EACH.


Nevermind that those 3.2GHz chips will cost a whopping $1,500 EACH :ouch:  :ouch:  :ouch: 
October 13, 2007 3:37:33 AM

Zornundo, can you link to the article that says the Xeon Extreme processors are going to cost $1500 a piece.

Thank you
October 13, 2007 4:49:39 AM

zornundo said:
Nevermind that those 3.2GHz chips will cost a whopping $1,500 EACH :ouch:  :ouch:  :ouch: 


This is the main reason why I would really hate to see AMD go down. Its a shame to see all these ppl trying so hard to bash and sink AMD. :( 
October 13, 2007 5:01:14 AM

cheri22984,

It is pretty funny to watch all the people hope for the demise of AMD, but I as you dread the day that AMD goes under.
October 13, 2007 5:25:16 AM

It is truly sad I have to admit. There are literally way too many fanboi's...Which makes no god damn sense to me. Why would you favor a company to that much of an extent? I favor performance. Whoever has the better performer for my BUDGET gets my money. Whether it be AMD or Intel is no difference...I have AMD rigs sitting next to me as well as Intel.

This isn't a god damn sports team. It's ludicrous to follow one so blindly and bad mouth the other. But I would admit...I never want to see AMD fall...But if it does...The look on the intel fanboi faces will be grand when the price of their so beloved processors skyrockets above reason. A nice slap in the face to realize how stupid and trivial their fanboy ideals are.

fanboi'ism is for idiots...Plain and simple.
October 13, 2007 5:52:37 AM

Why do you think Nvidia still sells the GTX for nothing less than $500 even though it was released about a year ago ? Theres no competition, so theres really no reason to lower the prices or release a new product. I have been reading the THF for years now, and I have never seen so many ppl so closed minded.
I guess that guy got banned and got his comments about "yomamafor1" deleted. If youre going to start a negative threat about AMD and have your sig that says "I am a dependent child who needs AMD to have bad yields... :D " you should expect to get flamed. Nothing really against you, but that guy who made those comments about you was somewhat right.
a b à CPUs
October 13, 2007 12:16:02 PM

zornundo said:
http://www.xbitlabs.com/news/cpu/display/20071011211728...

take it for what it's worth
Thanks for the link. If I didn't read it, I wouldn't have believed it. This article and link should be a thread all its own. Brilliant!




The new extreme chips from Intel will have thermal design power of 150W...Each Intel Core 2 Extreme QX9775 will cost $1499...As a result, gamers will have to pay roughly $6000 only for critical components...Intel Skulltrail gaming stations will easily pass $10 000 milestone. said:


The new extreme chips from Intel will have thermal design power of 150W...Each Intel Core 2 Extreme QX9775 will cost $1499...As a result, gamers will have to pay roughly $6000 only for critical components...Intel Skulltrail gaming stations will easily pass $10 000 milestone.
:lol:  :lol:  :lol:  300w just for the procs at $1500 each! :lol:  :lol:  :lol: 

Who wants to be the first (sacrificial) fanboy to defend Skulltrail?

Anyone and everyone who enjoyed a goot bit of craic about QuadFX/FASN8 from AMD can officially STFU! :kaola: 

October 13, 2007 3:43:00 PM

I was just about to link to XBit. I think the reaction is indicative of how "holier than thou" people treat Intel. I keep saying the same thing:

A 4GHz chip will debut at close to 200W no matter the process size.
October 13, 2007 5:45:46 PM

BaronMatrix said:
I was just about to link to XBit. I think the reaction is indicative of how "holier than thou" people treat Intel. I keep saying the same thing:

A 4GHz chip will debut at close to 200W no matter the process size.


:lol:  :lol:  :lol:  :lol: 

But what about "B3 revision" 4ghz Phenom X4?
October 13, 2007 8:50:51 PM

Quote:
It is truly sad I have to admit. There are literally way too many fanboi's...Which makes no god damn sense to me. Why would you favor a company to that much of an extent? I favor performance. Whoever has the better performer for my BUDGET gets my money. Whether it be AMD or Intel is no difference...I have AMD rigs sitting next to me as well as Intel.
This isn't a god damn sports team. It's ludicrous to follow one so blindly and bad mouth the other. But I would admit...I never want to see AMD fall...But if it does...The look on the intel fanboi faces will be grand when the price of their so beloved processors skyrockets above reason. A nice slap in the face to realize how stupid and trivial their fanboy ideals are. fanboi'ism is for idiots...Plain and simple.

Quote:
Why do you think Nvidia still sells the GTX for nothing less than $500 even though it was released about a year ago ? Theres no competition, so theres really no reason to lower the prices or release a new product. I have been reading the THF for years now, and I have never seen so many ppl so closed minded.


Here are some replies that make sense... AMD/ATi now being together will actually make it worse for both segments CPU and GPU if AMD go under. If the new CPU offering from AMD goes under Intel prices skyrocket and we wont see the competitive nature that the industry has seen for the past years that pushed us to the levels we are today. If AMD go under so do "ATi" so then NVIDIA will reign supreme and dominate the market also we could see the 8800GTX for years to come because they simply dont have anyone to compete against so why bother. Hell one year after its release im about to purchase a GTX later this week. Tell me another time in the GPU industry that you could buy a 1 year old card and still have it be the top performer?
October 14, 2007 12:57:11 AM

BaronMatrix said:
I was just about to link to XBit. I think the reaction is indicative of how "holier than thou" people treat Intel. I keep saying the same thing:

A 4GHz chip will debut at close to 200W no matter the process size.


Please provide a link for this assertion.

The xbit link certainly seems to indicate that the DT equivalent of Harpertown with an unlocked chip has a 150W TDP.

This is the same chip (I know) as the Harpertown 3.2. Same specs. Same process. Exact same hunk-o-silicon. How can one be rated 120W TDP (or, rather 80W+delta) and the other 150W TDP?

1) One of the sources is incorrect (I cut-n-paste mine from intels published website)
2) They are both correct.

I lean to #2. Why?

Realize the definition of intels TDP is maximum power. Given that the clock is unlocked, you have to expect people to overclock these guys. So, the maximum power for the skulltrail needs to be higher than the harpertown.

In fact, this is EXACTLY what intel does for the extreme processors:

to wit,
Processor Clock Speed Front Side Bus L2 Cache TDP
Intel Core 2 Quad Q6700 2.67 GHz 1066 MHz 2 x 4 MB 95 watts
Intel Core 2 Extreme Qx6700 2.67 GHz 1066 MHz 2 x 4 MB 130 watts
Intel Core 2 Extreme Qx6800 2.93 GHz 1066 MHz 2 x 4 MB 130 watts
Intel Core 2 Extreme Qx6850 3.00 GHz 3000 MHz 2 x 4 MB 130 watts
(http://www.pctechguide.com/26quadCore.htm)

Note that, for the VERY SAME piece of silicon at the same clockspeed (q700), you have a TDP difference. The reason: you are "able" (or officially allowed) to clock the qx series higher. So intel makes sure that the board/packaging/etc. designers keep these thermals in mind. *thats* what TDP was intended for. Not average draw. But maximum output.
October 14, 2007 1:18:51 AM

ryman554 said:

Realize the definition of intels TDP is maximum power.

Small correction, Intel's TDP is under load of normal application mix, while AMD's maximum TDP is a worst case scenario. Thats why AMD was at disadvantage there in the eyes of many users (even THG readers) when comparing TDP of both manufacturers, and thats why AMD introduced new system - ACP (Average CPU Power), which is similar to Intel's TDP.
October 14, 2007 1:25:00 AM

Intel Core 2 Extreme Qx6800 2.93 GHz 1066 MHz 2 x 4 MB 130 watts
Intel Core 2 Extreme Qx6850 3.00 GHz 3000 MHz 2 x 4 MB 130 watts


That says the 3GHz chip is 130W. I guess you could have one of the OCers from xtremesystems actually measure the power at one of those 4.1GHz OCs.
October 14, 2007 1:55:22 AM

BaronMatrix said:
Intel Core 2 Extreme Qx6800 2.93 GHz 1066 MHz 2 x 4 MB 130 watts
Intel Core 2 Extreme Qx6850 3.00 GHz 3000 MHz 2 x 4 MB 130 watts


That says the 3GHz chip is 130W. I guess you could have one of the OCers from xtremesystems actually measure the power at one of those 4.1GHz OCs.


Those are 65nm chips in that table. What I am saying is that, for the 65nm UNLOCKED processors, you will draw UP TO 130W, depending on how high you raise the multiplier, no matter the default stock speed.

There is no "locked" 3.0ghz chip on that table, so I can not comment on what the TDP rating is.

However, my original reply was to deal with Skulltrail, which is 45nm. Those draw less power. See my post, above. I will bet you, at 3.2Ghzm each quad core will draw MUCH closer to 80W than 150W.
October 14, 2007 2:02:35 AM

Harrisson said:
Small correction, Intel's TDP is under load of normal application mix, while AMD's maximum TDP is a worst case scenario. Thats why AMD was at disadvantage there in the eyes of many users (even THG readers) when comparing TDP of both manufacturers, and thats why AMD introduced new system - ACP (Average CPU Power), which is similar to Intel's TDP.


EDIT -- see below, I think you are wrong here. Intel uses a worst-case scenario to identify TDP.

However, I still stand by the logic that intel would *have* to raise the "typical" thermal to account for the typical overclocking ability.
a b à CPUs
October 14, 2007 1:40:27 PM

Add the power the Northbridge chews up while your at it if your going to make a true comparison.

October 14, 2007 4:34:29 PM

and also the amount of time it takes to complete a certain task.
October 14, 2007 5:17:33 PM

Harrisson said:
Small correction, Intel's TDP is under load of normal application mix, while AMD's maximum TDP is a worst case scenario. Thats why AMD was at disadvantage there in the eyes of many users (even THG readers) when comparing TDP of both manufacturers, and thats why AMD introduced new system - ACP (Average CPU Power), which is similar to Intel's TDP.


Actually, I'm not sure if that definition is correct.

According to Intel, the definition of TDP is:
Quote:
Thermal Design Power: A power dissipation target based on worst-case
applications.
Thermal solutions should be designed to dissipate the thermal
design power.


ftp://download.intel.com/design/processor/designex/3155...

Worst case scenario.

This is AMD's definition of TDP:
Quote:
the TDP, or Thermal Design Power, was used to represent the maximum power for the processor. Because this was an engineering design specification, it was significantly easier for AMD to report to customers.


So what Intel reported is more accurate than AMD's TDP. However, you're right that AMD's TDP is indeed higher than Intel's, and in most scenario, not realistic.

This is AMD's ACP definition:
Quote:
The geometric mean of measurements, taken during these workloads, is the ACP.


However, the geometric means are usually smaller than arithmetic means, which AMD should use in the first place.

October 14, 2007 9:42:47 PM

yomamafor1 said:
Actually, I'm not sure if that definition is correct.

According to Intel, the definition of TDP is:
Quote:
Thermal Design Power: A power dissipation target based on worst-case
applications.
Thermal solutions should be designed to dissipate the thermal
design power.


ftp://download.intel.com/design/processor/designex/3155...

Worst case scenario.

Since link is extremely slow, I'll just quote your post. Notice "applications"? Its not "Worst case scenario" as in AMD, its under load of choosen applications mix, similar to AMD's ACP.

Intel's TDP is meant for OEM, how to build systems to avoid overheating of cpu :
"Thermal Design Power (TDP) represents the maximum amount of power the thermal solution is required to dissipate. The thermal solution should be designed to dissipate the TDP without exceeding the maximum Tjunction specification. TDP does not represent the power delivery and voltage regulation requirements for the processor".

"Processor power dissipation simulations indicate a maximum application power in the range of 75% of the maximum power for a given frequency. Therefore, a system designed to the thermal design point, which has been set to approximately 75% of the maximum processor power would be unlikely to see the thermal control circuit active and experience the associated performance reduction"
!