AMD's jump to 45nm sooner than expected?

ryman554

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yes. I've posted on this before.. if they are "hoping it's gonna boot" in January timeframe, that pretty much designates first silicon. A key milestone to be sure, but that does not mean they will be selling.

Rule of thumb -- add ~1 year to first silicon to find your launch date. That means 45nm from AMD appear in the market around this time next year. They are not closing the gap with intel -- it's expanding.

CedarMill sold (first 65nm) -- Dec 05.
Conroe sold -- Aug 06.
Brisbane sold (first 65nm) -- "Dec" 06.
Penryn first silicon (first 45nm) ~Nov 06. Sold Nov 07.
Barcy's first silicon ~Aug 06. "sold" Sep 07. (relaunch Jan 08 -- you can see what one misstep can do)
Nehalem first silicon ~Sept-Oct 07. Launch ~Q4 08.
AMD first 45nm silicon ~Q1 08. Launch --- eta q1 09.
 

exit2dos

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They're intoducing High-K Metal Gates, Ultra-Low-K Interconnects, new (4th generation) Strained Silicon on their existing SOI process. On top of that, they're moving to Immersion Lithography.

If they can do all that, and have a shipping product within a year - I'd say Hector would be in line for another raise.

Personally, I don't see it happening.
 

ryman554

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Yeah, i know. A 48% reduction to their CapEx plan is NOT what AMD needs right now. This is absolutely the last place they need to cut spending... during a cycle which the CapEx should *grow* (build out of a new fab).

That is the sign of a very troubled company. The bigger question is to where the cuts are coming from? I don't think anybody knows.
 

spoonboy

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not all capex is tied to processor development, they spent alot of dosh upgrading fabs, particularly the one in dresden, germany. Cost them a packet. There's more costs under capex than just processor development.
 

BaronMatrix

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But remember that Brisbane appeared in Oct and shipped in Jan. Shanghai is not a tapeout as it were since it's just an optical shrink with more cache and probably an improved IMC. If there are samples in Jan, they will be ready by Q3.

Fab 30 is mainly shut down and Chartered supposedly hasn't gotten any orders, so Fab 36 is carrying the entire CPU supply chain. Cost savings.

Ehhh. never mind. Continue the death march.
 

yomamafor1

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Possibly from Bulldozer's R&D, R700, and Fusion. As someone already pointed out in another thread, Bulldozer and Fusion have been both removed from presentation in this analyst meeting. Also, where is Torrenza, an initiative AMD continuously touted before?

Ed had a really interesting take on it:
http://www.overclockers.com/tips01267/

Maybe AMD got advance word the world would end in 2008 because they seem to have scrubbed most of their post-2008 plans.

On the ATI side, R700 won't be out until 2009. The new CPU designs promised in 2009 have gone MIA, initiatives like Fusion will just reuse 2008 parts. Outside of switching to DDR3, mobos look the same way....
...

The question becomes, "Can AMD make money putting out deliberately second-rate products against Intel by saving on R&D and new technologies?"

The answer is, No. In the semi-conductor industry, if you stand still, you lose. No one can come up with a dated product, and still be able to make money.
 

turpit

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Ed should hire someone to scrub his articles. Im no angel, but

AMD's strategy the last few years has been "Do or die." Wall Street's response is now "Die," so the strategy shifts to "I don't want to die yet!"
While a wonderful, attention getting little quip, appears more like a vindictive personal wish than an accurate assesment. I highly doubt anyone on wall street, with the exception of those vested in Intel, wants to see AMD die. People selling off stocks, or investment firms refusing to lend money is not an ill wish, its just protecting their own interests.


For K10s to give AMD financial help, a lot of them need to be made, and they need to be sold at a rather higher price than K10s.
Umm, well....alrighty then.
No doubt he prolly meant "...higher price than K8s..", but maybe he meant a higher price than K10s are currenty going for......who can say for sure...only Ed.....and he should have done so with just a touch more care.

Let's look at these two issues. It doesn't look like Phenoms will ramp up in a flash quickly
What? as opposed to 'ramp up in a flash, slowly'?, or 'ramp up in a crawl quickly'? Old Ed needs to watch the old adjective/adverb combinations. It appears as if he got so 'enthusiastic excitedly' about emphasizing his point in a 'flash quickly', that he may have become a little 'spastic inattentively'.

All joking aside, this is very concerning
AMD's 45nm chips are not going to be made using IBM's latest and greatest technologies, using high-K dielectrics and metal gates. Rather, they're going to stick with what they've been dealing with, adding immersion technologies to be able to work at 45nm.
If there is an ounce of accuracy to what Ed is saying about AMD sticking to SOI @ 45nm, then considering the difficulties they encountered @ 65nm, well......


 

ryman554

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Since you ignored this last time, I'll cut and paste.

1) There most certainly *will* be a tapeout of Shanghai. How do you think they will get the reticles to print the 45nm wafers? They don't just attach a magnifying glass to the stepper, you know.

2) We are well past the days of a pure optical shrink. Since we are so far below the wavelength of light, you have to compensate different line sizes differently if you would take the exact same layout and "shrink" the drawn database. So, at the very least there is a bunch of data processing here.

3) Because we have now went to immersion, there are going to be different design rules. Just because the circuit blocks are the same does not mean that the design and layouts of those very same blocks will be the same. In fact,the designers almost have to go back to the drawing board for each "shrink" -- while they don't have to do the same sorts of tradeoffs with design choices and transistor budgets, they do have to rerun all of those place and route algorithms to get stuff to work right. It's not a new design, but there is a still significant design effort to get this done.

4) Note "they hope it will boot". That means that A0 has either NOT taped out (likely) or did not boot the OS. That means they are back to October of 06 in terms of a Barcelona timeline. how long did it take AMD to just work out design issues iwth Barcy to start selling it? Yup, about 1 year from Task Manager. Of course, since this is a "simple shrink", in your words, all they have to worry about debugging here is the process. And until you've got a working circuitry to debug a process with, your process isn't ready. Do you know how many reliability and design tweaks are going to be needed? Lots.

5) Note also they said "C-stepping" of Barcelona. Kind of like Penryn compares to Merom, don't you think? More or less a shrink with extras. Not a whole lot of extras, but extras nevertheless, since they've got some extra transistor budget laying around.

6) You can damn well bet your house that if they had a working 45nm logic prototype, AMD would be crowing about it. Hell, they crow over just about eveything else, why not this?

7) They say nothing about sampling in January. They say "initial samples", which is word for A0. These will be so far from production-worthy it won't even be funny. It is, however, a necessary step in MPU development.

8) SRAM is a far cry from logic. SRAM is a good vehicle to test out your process capability. But you don't get the random structures like you would on logic which cause all sorts of unforseen issues. Let's take intel's 45nm schedule as an example. Touts 45nm sram Spring of 06. Touts First working silcon Winter of 06. First CPUs shipping Fall-Winter 07. Believe it or not, this is FAST. You can't speed up infoturns -- when each full-loop takes > 1 month, feedback to design team, fixes = ~1 month, new masks in house = 2 more weeks -- we're talking aobut a 10+ week infoturn. Typically you'll need 3-4 of these to get a working part out, and presto! There's your year.

9) I seriously doubt that brisbase A0 was in october. Please provide a link to back up that claim. If you really believe Brisbane did not have a tapeout series, you need to do your homework.

10) Remind me when volume production of Birsbane hit consumers/vendors? I know you think it was in December, but you could barely find one until late into Q1. And, no, they did NOT disappear into China or wherever first.

11) But, of course, the DID miss out on their promised release date of Barcelona.... where volume shipments have been delayed until late Q1. This is NOT summer of 07 anymore. And if you consider that trickle of (broken) parts "a launch"......

12) You, yourself, have argued that the price war has crippled AMD's capability to do R&D and directly caused the Barcy fiasco. (I actually do not believe that the aforementioned statement is true, but let us take it at face value for now). Why, then would you think that it has not crippled AMDs ability to transition to 45nm?
 


LOL, I adore you.

You bring up a good point, shrinks are less complicated, however, AMD seems to delaying every single product launch, so we'll have to see.

I look forward to when AMD gets everything in-sync with ATI. I think we've only seen them scratch the surface there.