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About HT3 Quad core Phenom

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January 19, 2008 9:30:03 AM

Hi folks,


Please shed me some light on HT3 Quad core Phenom. What I know is Phenom 9500, 9550, 9600, 9650, etc. Googling did not find many info. TIA

B.R.
satimis

More about : ht3 quad core phenom

January 19, 2008 10:10:27 AM

Dude,...Phenoms,...are sweat,...really sweat,...if u want a phenom,...right now,...buy a 9600 black edition,..if u can wait...wait for the B3 version to come out,....rumors have it they over clock to 3.2 ghz!
January 19, 2008 10:12:55 AM

adlertheman said:
Dude,...Phenoms,...are sweat,...really sweat,...if u want a phenom,...right now,...buy a 9600 black edition,..if u can wait...wait for the B3 version to come out,....rumors have it they over clock to 3.2 ghz!


sweat? as in jogging 5 miles and your arm pits are... sweaty?
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January 19, 2008 10:18:54 AM

satimis... poor guy. I did a search, and man.. you got this question on the first 3 hits:

About HT3 Quad core Phenom

About HT3 Quad core Phenom

And then this forum. Hopefully someone will give ya some answers.

I'm kinda ignorant on the HTT side of things. I thought HTT3 was for the FX series, to were you need 2 chips? I know some things changed on the phenom side, but that would be interesting to know. :D 
January 19, 2008 2:30:48 PM

Grimmy said:
sweat? as in jogging 5 miles and your arm pits are... sweaty?

ROFL-LOL
January 19, 2008 4:06:36 PM

adlertheman said:
Dude,...Phenoms,...are sweat,...really sweat,...if u want a phenom,...right now,...buy a 9600 black edition,..if u can wait...wait for the B3 version to come out,....rumors have it they over clock to 3.2 ghz!


Are you saying Phenom needs some deodorant? :lol: 

January 19, 2008 5:40:16 PM

epsilon84 said:
Are you saying Phenom needs some deodorant? :lol: 


I think they do - too keep them cool, they could also use some lucozade to make them perform better........
January 19, 2008 6:10:00 PM

grimmy: theres a difference betwen the HTT version and the number of links
all opteron high end, do have 3 links , but they're older HTT model..
January 19, 2008 6:49:12 PM

well, Phenoms do stink
January 19, 2008 7:25:24 PM

HyperTransport (HT) is just a type of interconnect AMD uses in their CPUs to provide wider (not faster) bus between CPU, RAM, and other system components. HT3 is just the third iteration of such protocol. To learn more, you can go to HyperTransport Consortium's website.

http://www.hypertransport.org/tech/tech_htthree.cfm?m=3

Basically, HT3 enabled Phenom have much more bandwidth than the previous generation of Athlon X2s, going from 22.4Gb/s to 41.6Gb/s. So far, HT3 is only implemented on Phenom, but not Barcelona.

I'm not exactly sure why would AMD implement HT3 on Phenom, but not on Barcelona. Desktop applications rarely consume much bandwidth compare to server applications. This is also the reason why Intel can utilize age-old interconnect technology like FSB, but still manage to outperform AMD on all front.

HT3 especially has a lot of benefits in multi-socket servers (2~4 or more CPU). Due to the nature of the system architecture, multi-socket servers usually suffer from NUMA effect (none-uniform memory architecture). This means since memory banks are shared among CPUs, if CPU0 have to access the memory bank for CPU1, system will suffer great latency just from going to CPU1, retrieve the data, and send it over to CPU0's memory bank. As a result, the benefit of having a wider bus means more data can be transferred during a clock cycle, thus reducing the total amount of time during the transfer.

This is all I know in regards to HT3. If you want to know more, you can look for MU_Engineer. He's an expert in this area :kaola: .
January 19, 2008 7:58:23 PM

yomamafor1 said:
HyperTransport (HT) is just a type of interconnect AMD uses in their CPUs to provide wider (not faster) bus between CPU, RAM, and other system components. HT3 is just the third iteration of such protocol. To learn more, you can go to HyperTransport Consortium's website.

http://www.hypertransport.org/tech/tech_htthree.cfm?m=3

Basically, HT3 enabled Phenom have much more bandwidth than the previous generation of Athlon X2s, going from 22.4Gb/s to 41.6Gb/s. So far, HT3 is only implemented on Phenom, but not Barcelona.

I'm not exactly sure why would AMD implement HT3 on Phenom, but not on Barcelona. Desktop applications rarely consume much bandwidth compare to server applications. This is also the reason why Intel can utilize age-old interconnect technology like FSB, but still manage to outperform AMD on all front.

HT3 especially has a lot of benefits in multi-socket servers (2~4 or more CPU). Due to the nature of the system architecture, multi-socket servers usually suffer from NUMA effect (none-uniform memory architecture). This means since memory banks are shared among CPUs, if CPU0 have to access the memory bank for CPU1, system will suffer great latency just from going to CPU1, retrieve the data, and send it over to CPU0's memory bank. As a result, the benefit of having a wider bus means more data can be transferred during a clock cycle, thus reducing the total amount of time during the transfer.

This is all I know in regards to HT3. If you want to know more, you can look for MU_Engineer. He's an expert in this area :kaola: .


Yeah HT3 was designed to help performance in servers but it turns out that OEMs like Dell, etc want backwards compatibility more than performance.

This way they can keep selling their current socket F servers with barcelona processors rather than start equipping some servers with socket F+ motherboards specifically for barcelona while keeping another line of servers with socket F motherboards for older dual-cores.

This is just my understanding of it anyway. Even though they could just switch completely to socket F+ which would also accommodate all processors as well as give HT3 capabilities to barcelona processors.
January 19, 2008 11:26:33 PM

Grimmy said:
sweat? as in jogging 5 miles and your arm pits are... sweaty?

lmao, that was funny
a c 100 à CPUs
January 20, 2008 2:36:47 AM

yomamafor1 said:
HyperTransport (HT) is just a type of interconnect AMD uses in their CPUs to provide wider (not faster) bus between CPU, RAM, and other system components. HT3 is just the third iteration of such protocol. To learn more, you can go to HyperTransport Consortium's website.


AMD uses HyperTransport to connect between the CPU and the southbridge as the northbridge sits in the CPU in all AMD Athlon 64/Phenom processors. AMD also uses HyperTransport to communicate between separate CPU sockets in a multi-socket Opteron setup. On an interesting note, NVIDIA chipset for Intel CPUs also use HT to communicate between the northbridge and southbridge, even though the northbridge uses the FSB to talk to the CPU.

Quote:
I'm not exactly sure why would AMD implement HT3 on Phenom, but not on Barcelona. Desktop applications rarely consume much bandwidth compare to server applications. This is also the reason why Intel can utilize age-old interconnect technology like FSB, but still manage to outperform AMD on all front.


There are a few points in your post:

1. The Phenom and Barcelona 2300/8300 Opterons are made from the same basic die, so both have the same parts. AMD supposedly enabled HT3 on Phenoms and not Barcelonas because the socket-to-socket HT3 links would not work properly with existing Socket F dual Opteron motherboards. This is an issue because AMD promised that businesses that bought Socket F setups could upgrade to quad-core CPUs and they had to make good on it.

2. The HT on a desktop chip is used for CPU-to-southbridge communication, which uses very little bandwidth. The main bandwidth to and from a CPU has to do with its memory demands, which is handled by the memory controller, which is wired directly to the RAM in a desktop K8 or K10. Now in an Opteron server, the CPU has memory access both through its own memory controller as well as over HT from a neighboring CPU's memory controller (the data in RAM is distributed between all of the sockets' RAM banks.) HT also handles socket-to-socket communication. That is why HT speed matters little on a desktop K8/K10 and matters greatly on a dual/quad/8-socket Opteron.

3. On all Intel setups, the FSB handles all of the I/O from the CPU- be it straight memory access or die-to-die or socket-to-socket communication. On a desktop, the FSB has more than enough bandwidth to handle two dies in a Core 2 Quad. It starts to struggle when it gets fed four dies in a dual-quad-core Xeon 5300 setup. The desktop is not suffering from the FSB and won't for some time, however, the FSB has started to reach its limits on the server. The latest 1600 MHz FSB Xeon 5400 series with large 12 MB L2s are about the end of the line for the FSB on a server as even this highly-clocked FSB and big L2 cache setup struggles to scale as well as AMD's multiple integrated memory controller and HT setup. 400 MHz is quite high for a FSB and pushing it much higher will encounter increasingly hot and expensive northbridges as well as more complex and expensive motherboards in order to route those FSB data lines without encountering cross-talk. This is why Intel is looking to adopt an IMC and socket-to-socket bus in a manner very similar to AMD's in the upcoming "Nehalem" Xeon CPUs.
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