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B3 coming in March

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January 25, 2008 3:28:46 PM

Looks like B3 stepping Phenoms should be around in march.

http://www.tomshardware.com/2008/01/25/amd_to_showcase_upcoming_phenom_cpus_at_cebit_2008/

Maybe the fact that they are taking them to Cebit means they have also increased performance. Otherwise why would you take what will be by then a 6 month old cpu with a new stepping.

More about : coming march

January 25, 2008 4:05:32 PM

Maybe overclocking is a realistic prospect with the b3?
January 25, 2008 4:11:13 PM

spoonboy said:
Maybe overclocking is a realistic prospect with the b3?


@65nm, doubt it.

The OC issue comes from insisting on doing a monolithic design @65nm.

They need to get out tri and dual cores, those will clock higher.
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January 25, 2008 5:35:12 PM

WoW! Amost a 300Mhz OC on that puppy.

I imagine the Phenom 9900 will likely slip into the $199 slot some of the current processors have.

That could drop some of the the phenoms down into the mid or low $100 range.

They could be very nice chips at that price.
January 25, 2008 6:52:36 PM

I agree, it would be a good mid range offering for those that prefer AMD
January 25, 2008 8:04:42 PM

TechnologyCoordinator said:
@65nm, doubt it.

The OC issue comes from insisting on doing a monolithic design @65nm.

They need to get out tri and dual cores, those will clock higher.


Actually you are mistaken in this assumption. The problem with the Phenoms is not core overheating but the fact that they hit a clock frequency ceiling which is relatively quite low (even compared to the AM2 Athlons which also have a relatively low absolute clock ceiling - compared to Intel). Now if you look at the die on the dual and tri-core Phenoms all the inefficiencies will still be there (latency from 2nd level cache, extra length of pathways around the very spread out die). This is just basic Electronic Engineering principles!!

The B3 stepping will overclock just as poorly as the B2 stepping. THG recently tested this:
http://www.tomshardware.co.uk/phenom-9600-black-edition,review-30093.html
The overclock is pitiful even with the BIOS TLB fix disabled. So how do you figure having the TLB problem fixed is going make things any better??!!

People are comparing the Phenom to the P4 Prescott (space heater, etc.) but actually for all its flaws (long pipeline latencies) the P4 Prescott did overclock very well (4Ghz was achievable on air). The Phenom maybe more efficient but it clearly has some serious clocking issues which give it a very low ceiling...

Basically I think AMD are in some very serious problems now with no sign of a rescue. When Intel copy the integration of memory controllers and inter-core serial links this will kill off AMDs only trump card in the Desktop space... If Intel replaced the FB-DIMM crap in their server products then AMD could lose the only market they can actually make money on (look at the current price of their high clocking Opterons!!)

Bob

January 25, 2008 8:14:08 PM

bobwya said:
.... out die). This is just basic Electronic Engineering principles!!


Actually what you are saying in your post, without realizing it, is that Intel will have the same problems with their Nehalem and they won't be very good at overclocking.

If your guess is true... how does this "kill off AMD's trump card"?
January 25, 2008 8:27:55 PM

bobwya said:
The B3 stepping will overclock just as poorly as the B2 stepping. THG recently tested this:
http://www.tomshardware.co.uk/phenom-9600-black-edition,review-30093.html
The overclock is pitiful even with the BIOS TLB fix disabled. So how do you figure having the TLB problem fixed is going make things any better??!!


That black edition is B2 so is prone to all the same problems the non-BE B2 processors have. We know these problems exist, and also that the fix for the TLB bug (when taken individually) is probably not going to change the overall performance by anything more than a percentage point (1%) at most, if it makes any difference on its own at all.

However, AMD have been noted saying that following B3 the next stepping will be a C stepping and will be on 45nm. Do you really think they (before the TLB "crisis" came about) originally planned to introduce phenom as B2 and not make any changes to it's design for as long as it takes to get their 45nm working? No, they'd likely already planned for B3, which means there are likely to be other changes in it other than the TLB fix.

Those other changes *might* make a difference in performance and/or overclocking headroom, which would be good for AMD, good for competition, and very good for our wallets.
a c 126 à CPUs
January 25, 2008 8:45:47 PM

keithlm said:
Actually what you are saying in your post, without realizing it, is that Intel will have the same problems with their Nehalem and they won't be very good at overclocking.

If your guess is true... how does this "kill off AMD's trump card"?


Actually we have no idea what will happen with Nehalem. And considering it is coming out this year and Intel is still boasting its huge performance gains means they might not have any problems yet.

Right now AMDs only real trump card is their IMC and Directconnect. Once Intel impliments those AMDs FP and memory bandwidth advantage will no longer be there especially in the server market considering Intel plans on quad channel meaning it will probably double the bandwidth available and unless AMD has that planned for Q4 08 it might kill off AMDs major server advantage.

And he is right the TLB being fixed doesn't guarantee any OC'ing headroom gains, performance gains or any of it really. What I see it doing is possibly lowering the thermal envelope but I doubt it since its only the second stepping.

I just hope they can get a higher than 2.6GHz clocked part since even that fails to outperform a Q6600. Its really depressing to see AMD having no competative products.
January 25, 2008 9:08:07 PM

keithlm said:
Actually what you are saying in your post, without realizing it, is that Intel will have the same problems with their Nehalem and they won't be very good at overclocking.

If your guess is true... how does this "kill off AMD's trump card"?


Woahh there,

You are misquoting me. I was saying that that AMD have a major process disadvantage as they have no headroom for overclocking. Look at the 65nm dual-core Athlons and Opterons. They max. out around 3.2Ghz and get very hot/have massive power draw at that level. Intel's 45nm chips have massive room for overclocking (6Ghz is the record). So I would expect their monolithic dies to have good OC's as well at 45nm and lower. Don't forget they have the new Hi-K process in their arsenal now as well (resulting in lowered CPU power consumption overall - ideal for a monolithic quad core)!!
AMD have not even migrated to 45nm yet. Since they have not demonstrated any working products at this feature size we cannot speculate (even) that their overdraft will allow them to start producing real Silicon at 45nm in 2008. They have simply stated that they will achieve this in press releases (words are cheap)...

Intel have such a big R & D budget that they already are working on the Nehalem chips and demonstrating working Silicon (i.e. action not just words)... This means they are less likely to shot themselves in the foot with a serious design mistake like the TLB errata that AMD currently have in the early steppings...

Once Intel copy AMD's architectural advantages (serial interconnect, integrated memory controller, dumping stupid FB-Dimm idea - this will go the way of Rambus very soon I predict :lol:  ) then AMDs market will be compressed to the sub 100-200USD range... This is like not good for anyone of course and I am no Intel fanboi :non:  (in fact I still mainly buildup AMD/ATI-based systems for people)...

Bob

January 26, 2008 4:04:54 AM

bobwya said:
Woahh there,

You are misquoting me. I was saying that that AMD have a major process disadvantage as they have no headroom for overclocking. Look at the 65nm dual-core Athlons and Opterons. They max. out around 3.2Ghz and get very hot/have massive power draw at that level. Intel's 45nm chips have massive room for overclocking (6Ghz is the record). So I would expect their monolithic dies to have good OC's as well at 45nm and lower. Don't forget they have the new Hi-K process in their arsenal now as well (resulting in lowered CPU power consumption overall - ideal for a monolithic quad core)!!
AMD have not even migrated to 45nm yet. Since they have not demonstrated any working products at this feature size we cannot speculate (even) that their overdraft will allow them to start producing real Silicon at 45nm in 2008. They have simply stated that they will achieve this in press releases (words are cheap)...

Intel have such a big R & D budget that they already are working on the Nehalem chips and demonstrating working Silicon (i.e. action not just words)... This means they are less likely to shot themselves in the foot with a serious design mistake like the TLB errata that AMD currently have in the early steppings...

Once Intel copy AMD's architectural advantages (serial interconnect, integrated memory controller, dumping stupid FB-Dimm idea - this will go the way of Rambus very soon I predict :lol:  ) then AMDs market will be compressed to the sub 100-200USD range... This is like not good for anyone of course and I am no Intel fanboi :non:  (in fact I still mainly buildup AMD/ATI-based systems for people)...

Bob


What architectural advantages other than an additional FPU does AMD have on Intel? Last I checked Intel's current solution does not saturate the FSB enough to note. In servers this is a much different story as there are generally more intercommunications going on but that’s task specific and in some cases code specific. But regardless Intel doesn’t have to bring the technology to the desktop other than to ensure adoption and a new upgrade path for their platforms.

The real key to this technology is the fact that Itaniums and Xeons can intermingle without a great deal of overhead on the intercommunications end. Since in the end Intel is only trying to get mass adoption of IA-64 which will give us the clean slate we desperately need. I'm not saying IA-64 is the answer as any other ground up solutions will work, it just happens to be Intel’s idea of a clean slate.

As for the memory controller that goes with my initial statement above it's very apparent that the current implementations of their desktop line does not need it, its more or less a new socket new upgrade path.

Do you know the technological advantages that FB-DIMMS bring to the table in the area of bandwidth and overall data and signal quality of competing DDR technologies? I am assuming no as you seem to firmly believe that FB-DIMMS are going the way of RDRAM which is far from the case, when it comes to large memory requirements FB-DIMMS are the more viable solution for those types of environments.

Word, Playa.
January 26, 2008 1:07:14 PM

Actually, I believe the TLB fuss, and delays to get to B3 have more to do with successful binning at higher clocks. Probably due to something in the process.

I'm currently running my 9600BE at 2.7Ghz core 2.0Ghz NB. It ran through 12 hours of Prime95 v25.6 Blend over night and hit no errors. Switched it over to prime95 small fft to make sure on core stability. Gonna let that run while I'm out of the house today. I haven't gove over 39c CPU temp according to Everest yet, and the core temps are hanging below 30c under full load. And thats running pretty much at stock voltage. I've been reading on Xtremesystems forum to watch what others have been able to do with theirs. And the funny thing is, part of the OCing has to do with BIOS issues. The other part has something to do with the individual CPUs. They've been trying to keep track of what weeks and and lots the cpu's were from. There seems to be no effect regardless of week and run number. One processor from the same bin can OC higher than another from the exact same week bin.

To me that points to their having problems with Yield Issues at the higher clocks. And I've said it before, I do believe their other problem with B2 is the fact they aren't able to set the parts at full NB/HT speed like they're supposed to be able to do. Also the 9600 BE seems to be an oddball when it comes to OCing. It has a lot lower HT ref clock tolerances than the 9500 does. On other forums I've seen people pushing HT ref to 267Mhz able to get close to 2.9ghz stable or close to that stable on them. Where as the 9600 BE is limited to about 230HT ref clock.

And since I'm a noobler and can't figure it out. How do you do a screenshot of your desktop???
January 26, 2008 1:17:24 PM

Print Screen button captures what's on the screen to the clipboard. Open paint, and paste, and save.
a b à CPUs
January 26, 2008 1:55:14 PM



AMD simply must have some issues with the 65nm tech that are taking a fair bit of time to iron out.

Looking at the 512K (X2) mask they still ar'nt running as fast as the 6400+ 90nm parts ... and have half the cache. Apart from low power the whole 65nm K8 are duds.

They got to 3.2 on the 90nm node ... albeit it took some time.

I imagine they are looking at a number of issues including trace lengths ... and the B3 being done in such a short time suggest they are only addressing a few issues here ... especially if it is due in March (rumour).

I'd imagine another stepping will follow quickly but in order to step the frequency up they need to look at the layers ... and doping.

Oh ... and the gates.

I'd love to see an infrared shot of the die under load as I think there is a hot spot (s) causing the mem controller and L3 cache to be wound back for retail.

Intel's double cheeseburger approach here is a bonus as the heat is dissipated across 2 dice ... if they had a high speed interconnect the core2 design would be markedly more powerful too ...

AMD just can't build circuits as well with this technology yet.

Too few layers ... budget bin approach.

Like the early XP's ... you would think they would have learned.

I'm being harsh ... sorry.
January 26, 2008 2:24:03 PM

I think you're probably right about a possible hotspot Reynod. May be something that the Stock HSF that comes with the cpu can't counter. Anyone I've seen testing with an aftermarket unit, like the Zalman 9700, TRUE, and ZT Nirvana seem seem to be able to push the Northbridge/IMC speeds up as high as they want, even if they aren't OCing the cores.

And heres a screeny as proof of me running stable at 2.7Ghz




*sigh* defeated by photobucket autoresizing.
a c 125 à CPUs
January 26, 2008 3:02:36 PM

use imageshack.us then :p 
January 26, 2008 3:14:26 PM

Mathos

Nice to see you got over the initial problems your were having OC.
January 26, 2008 3:45:11 PM

gpippas said:
Mathos

Nice to see you got over the initial problems your were having OC.


Yup, Clean install of Windows XP pro, and not using AOD V2.12 beta did the trick. Seems AOD is causing some major issues with stability. Only problem is that seems to also be the only way to change hyper transport speed at the moment. It also helps that I finally figured out how to get the P State settings to work properly to change the multi in the bios, instead of having to use AOD for it. The next thing I'm going to do is once I'm positive I'm stable here, I'm gonna push the NB/IMC speed up to 2.6Ghz and make sure that will run stable, it's currently running at 2.0 on 1.1v and that is below stock spec volts if I remember correctly. So I shouldn't have too much issue with hitting 2.6 or even 2.8 on the NB. Though going by what I've been reading on the other forum, I should be able to push 3.0 or 3.2 out of the cores without much problem, going by the stability on it's current settings. I still can't find a way to change the HT speed in BIOS, may be doable with a later bios. Currently the only way to do so is through AOD.

Also there seems to be something about needing to burn in the speeds slowly with the cpu and chipset. MSI actually recommends stepping up the HT Ref 2Mhz at a time, and doing a 24 hour or longer burn in before stepping it up again etc.

The only problem I have with changing the NB speed though, is I'll have to do another fresh reinstall of Windows. Seems as though changing the NB/IMC speed on the phenom has the same effect on windows stability as changing the FSB speed did on the old 440BX based P2 boards. Granted that does still hold true on the Intel side today doesn't it as far as changing the FSB goes with Windows?

But, as far as the B3 things goes. I do believe if they got some of the issues worked out as far as NB/TLB speed fixed to where the cpu can run at its proper speed bins, that things should start looking up for the k10/Phenom. It's also my opinion that if that is the case, that the Phenom x3 will likely end up being the sweet spot for the Agena core. Kinda a hybrid between the quad for doing compression and rendering and stuff. With the possible ability to hit a higher OC than the quad version would be capable of.
January 26, 2008 8:30:27 PM

spud said:
What architectural advantages other than an additional FPU does AMD have on Intel? Last I checked Intel's current solution does not saturate the FSB enough to note. In servers this is a much different story as there are generally more intercommunications going on but that’s task specific and in some cases code specific. But regardless Intel doesn’t have to bring the technology to the desktop other than to ensure adoption and a new upgrade path for their platforms.

....

Do you know the technological advantages that FB-DIMMS bring to the table in the area of bandwidth and overall data and signal quality of competing DDR technologies? I am assuming no as you seem to firmly believe that FB-DIMMS are going the way of RDRAM which is far from the case, when it comes to large memory requirements FB-DIMMS are the more viable solution for those types of environments.


Spud

This is going a bit of topic mate. Just google on FB-DIMM and you will see there are big problems with heat generation, and the extra latency the controller chips add. Not to mention the extra power draw they add to the system. I gather DDR3 ECC chips are about to hit the shelves as well...

AMD have no real ISA advantages over Intel (except perhaps the ability the run x64 instructions more efficiently).
If you check out:
http://www.xbitlabs.com/articles/cpu/display/core2duo-preview_9.html#sect0
You will see that you are somewhat miss informed about the Core 2 architecture... The whole FPU advantage AMD had was vs. the Netburst architecture... AMD K8 architecture has a 3-way superscalar design while the core 2 architecture can issue up to 5 instructions per clock - maximum (through its technique of instruction folding). It has 4 FPU units and I believe it can issue to each of these in one clock (noting that 2 units simply load and store FPU registers to RAM/cache). It also has out-of-order instruction issue (which I believe was not implemented in the K8 architecture).

AMD do have some system-level advantages - namely the inter-core serial links and the on-die memory controllers (as I stated previously). Intel have stated they plan to implement these soon (not sure what the road-map is on this - just visit Intel's website) this could cause some real problems to AMD (high bandwidth, low-latency DDR3 RAM combined with a low latency on-die memory controller - ouch!!).

Bob
January 27, 2008 4:44:08 AM

bobwya said:
Spud

This is going a bit of topic mate. Just google on FB-DIMM and you will see there are big problems with heat generation, and the extra latency the controller chips add. Not to mention the extra power draw they add to the system. I gather DDR3 ECC chips are about to hit the shelves as well...

AMD have no real ISA advantages over Intel (except perhaps the ability the run x64 instructions more efficiently).
If you check out:
http://www.xbitlabs.com/articles/cpu/display/core2duo-preview_9.html#sect0
You will see that you are somewhat miss informed about the Core 2 architecture... The whole FPU advantage AMD had was vs. the Netburst architecture... AMD K8 architecture has a 3-way superscalar design while the core 2 architecture can issue up to 5 instructions per clock - maximum (through its technique of instruction folding). It has 4 FPU units and I believe it can issue to each of these in one clock (noting that 2 units simply load and store FPU registers to RAM/cache). It also has out-of-order instruction issue (which I believe was not implemented in the K8 architecture).

AMD do have some system-level advantages - namely the inter-core serial links and the on-die memory controllers (as I stated previously). Intel have stated they plan to implement these soon (not sure what the road-map is on this - just visit Intel's website) this could cause some real problems to AMD (high bandwidth, low-latency DDR3 RAM combined with a low latency on-die memory controller - ouch!!).

Bob


I did not state the obvious faults of FB-DIMMS because you already are aware but regardless the technology is faster than ECC DRAMS and if you are going to say build a server farm or data center around this technology as being the proprietary memory, you will have adequate cooling in the form of forced air cooling and energy draw from idle to full workload are negligible as it would be cost of ownership and if a few dollars is going to break the purchasers bank they obviously wont be able to afford the systems in the first place.

Currently the next generation FB-DIMMS are 1/2 the energy and heat output making the technology that much more viable.

What does 3-way superscalar and core 2's 5 decoded instructions per clock have to do with the specific architectural differences between the 2 processors, the do aren't associated in any form.

Like I said the K8 and K8L have a more powerful FPU system that being AMD has 3 fully functioning units when Intel has 2 fully functioning units and 2 for loading and storing. Also both chips and a fair many back are OoO processors.

Yes I know what the outcome will be with the core 2 architecture and an on die memory controller, the point I was making is on the desktop side of things we don’t "need" the new system interfaces as the FSB is not showing saturation to make it compelling need to switch to a on die controller. I’m not saying it shouldn’t be there I am saying its not needed for the applications we put a home pc through.

Word, Playa.
a b à CPUs
January 27, 2008 4:47:33 AM

Has anyone taken the IHS off the Phenom and tried bare metal to core?

Like with the IHS's on the later Intel chips they are hard to remove safely??

Any advice here?

The larger surface area of the quad core AMD chip will probably benefit from removal I'd suggest.

Just throwing this in for discussion.
a b à CPUs
January 27, 2008 5:09:21 AM

http://www.cadence.com/whitepapers/interconnect_layers_...

http://www.cs.virginia.edu/papers/therminic_hotspot_THE...

AMd's quad core probably has a hot spot in the centre of the die when the memory controller is run at a higher frequency ... well that's my assertion anyway. Possibly each or the core's might have a similar problem?

Plus the L3 cache probably needs some work in that respect too.

Not that anyone is going to tell us ...

Pity we can't find a transparent heatsink and get an IR shot of the die.

Goof luck with your overclocking ... keep us posted on whether the memory / L3 cache speed improvements help the system overall.
January 27, 2008 5:14:42 AM

Damn what do you guy's expect?

What AMD is doing right now should be a clear indicator of why the quad they make is not the fastest! Intel has been working on there upcoming new releases for quite some time now and it's nothing terribly new..AMD on the other hand has a brand new architecture to to figure out all the kink's for! Common sense tell's us unless Intel is doing the same thing "which i believe they are" then the native quad AMD has worked soo hard on will be a better product.

Core 2 Duo was a better product than Anthlon 64X2 soo it's obvious that when they slap two of them together they will be faster than a brand new quad architecture from AMD.

AMD need's time and guess what they have it soo long as ATI is doing half well and they actually are doing pretty good right now! The next 6-9 month's are going to be real good someones going to come up on top and it's hard to tell who? Intel with there massive bugdet and unlimited fund's, or AMD who's smart moves and hard working innovative tendencies could prevail?

Honestly AMD isnt going anywhere guy's they dont need the fastest quad or processor to make enough money to stay afloat!

-Dustin
a b à CPUs
January 27, 2008 5:45:27 AM

I'm actually an AMD fan ... no need to shoot me.

I'm interested in how to improve it's performance.

Actually AMD has no excuse in respect to core2 vs K10 ... both are just evolutionary extensions (core2 being based on P3 / Mobile, and K10 based on K8 / K7 but widened). I've probably simplified that a bit too much ... sorry.

AMD simply need to do some more work.

Like Intel rested on their Laurels after P3 and P4, AMD did that same after A64.


January 27, 2008 6:12:59 AM

spud said:

Currently the next generation FB-DIMMS are 1/2 the energy and heat output making the technology that much more viable.

I've heard that next generation fbdimms will use 1.5v, and that will net a 20% reduction in watts. What other news do you have?
I dont see those working too well with Intel's 45 nano MG tech through an IMC though. That process doesn't take too kindly to so much voltage.
January 27, 2008 6:28:12 AM

Reynod said:
I'm actually an AMD fan ... no need to shoot me.

AMD simply need to do some more work.

Like Intel rested on their Laurels after P3 and P4, AMD did that same after A64.

You of all people should know how long it takes for AMD to get up to speed on a new node.They tweek thier masking, they fine tune thier process, and slowly thier higher clock bins grow. That's why the 3.2ghz x2 6400s are on 90 nanos.
Intel's real gain from P4 was the high quality process it required. AMD on the other hand, have balanced process capability with required speed. It will take a major breakthrough on AMD's part, to get any real ocing chips out.
January 27, 2008 3:24:43 PM

endyen said:
I've heard that next generation fbdimms will use 1.5v, and that will net a 20% reduction in watts. What other news do you have?
I dont see those working too well with Intel's 45 nano MG tech through an IMC though. That process doesn't take too kindly to so much voltage.


They could very well be I have next to no background information on FB-DIMMS other than there speed and signal integrity in large memory amounts. But ya I overshot the power reduction but that’s what happens when you post at 11pm higher than a kite :kaola:  . But either or a reduction is a reduction 20% or 50% doesn’t change too much other than I overshot it thanks for the correction.

As for the Intel 45nm node with an IMC I don’t see it being a real issue since 1.5v is the draw at the modules the data signal will have its own characteristics.

Word, Playa.
!