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Errata (TLB) Fixed in Barcelona Finally

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March 1, 2008 10:57:47 PM

Bout damn time, maybe we can see some real performance out of these b3 procs, hopefully with improved nb/IMC speeds.
March 1, 2008 11:47:28 PM

I think AMD really needs to make their processors faster, not fix some silly bug that barely ever occurs
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March 1, 2008 11:50:39 PM

well the article doesnt really state which TLB bug was fixed... but good to hear B3 is actually coming.
March 2, 2008 2:08:06 AM

Don't want to ruin the party but, how much improvement can be done in just a few months?
March 2, 2008 3:33:17 AM

This is just for the server platform that is going to get the B3 version first then the Phenom will see it.
March 2, 2008 4:16:07 AM

thefumigator said:
Don't want to ruin the party but, how much improvement can be done in just a few months?


Depends entirely on what's causing the bug. If it's just a matter of rerouting a signal that's right on the limits for valid timings (so sometimes it works, sometimes it doesn't) then it could easily be fixed in a couple of months; one chip I worked on had serious problems which turned out to be due to the routing software having a brain-fart and putting in a wire that was almost half an inch long when it should have been a couple of millimeters... fixing the chip was trivial once we realised that.

Even if it's a logic issue, that can often be fixed without respinning the silicon (which takes much longer than metal layer changes).
March 2, 2008 4:37:31 AM

Read the article, ther was a correction. They are not shipping barcelonas...they are shipping 'samples' aka ESs for verification
a b à CPUs
March 2, 2008 10:09:25 AM

I imagine their server market partners will breathe a sigh of relief ...

It has been so long ...
March 2, 2008 11:12:36 AM

I wonder if THG can get their hands on a Barcelona B3 sample and see if it is any better than the first one.
March 2, 2008 11:26:11 AM

paranoidmage said:
I think AMD really needs to make their processors faster, not fix some silly bug that barely ever occurs


Using virtualization, something becoming increasingly commonplace in Data centers, makes the TLB bug much more likely to happen.


And yes, there was a correction to the article:

Quote:
(Correction: AMD is shipping samples of the Barcelona processor to channel and distribution partners not production versions of the chip.)
March 2, 2008 3:36:58 PM

TechnologyCoordinator said:
Using virtualization, something becoming increasingly commonplace in Data centers, makes the TLB bug much more likely to happen.


And yes, there was a correction to the article:

Quote:
(Correction: AMD is shipping samples of the Barcelona processor to channel and distribution partners not production versions of the chip.)

Well that and the current workarounds are hurting performance, so fixing the TLB Errata should increase performance as well!
I fancy a change from my 6000+ to a nice speedy Phenom!
March 2, 2008 3:45:28 PM

LukeBird said:
Well that and the current workarounds are hurting performance, so fixing the TLB Errata should increase performance as well!
I fancy a change from my 6000+ to a nice speedy Phenom!


The article is about the Barcelona, which is a K10 Opteron. Currently there are no work arounds for defective K10 Opterons, but rather AMD sells the defective chips to customers that aren't affected by the bug.

However, once AMD gets around to fixing Agena (Phenom, K10 quad-core), then we will see a performance boost in comparison to patched systems. However, keep in mind many of the benchmarks used today are UNPATCHED Phenom systems. So in comparison to those systems, simply fixing the bug won't increase performance.
March 2, 2008 3:56:59 PM

MarkG said:
Depends entirely on what's causing the bug. If it's just a matter of rerouting a signal that's right on the limits for valid timings (so sometimes it works, sometimes it doesn't) then it could easily be fixed in a couple of months; one chip I worked on had serious problems which turned out to be due to the routing software having a brain-fart and putting in a wire that was almost half an inch long when it should have been a couple of millimeters... fixing the chip was trivial once we realised that.

Even if it's a logic issue, that can often be fixed without respinning the silicon (which takes much longer than metal layer changes).


I was talking purely about performance improvements, sorry if I haven't mentioned that.
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March 2, 2008 3:57:08 PM

What TC said. Most benches we see are without the patch for the TLB bug since most every desktop user will not see it so even with the B3 fixing the TLB errata, there is no guarantee(and more than likely not) for a performance boost.

Although it should help sell more Phenoms to those who think the bug was a show stopper.
March 2, 2008 9:59:18 PM

jimmysmitty said:
What TC said. Most benches we see are without the patch for the TLB bug since most every desktop user will not see it so even with the B3 fixing the TLB errata, there is no guarantee(and more than likely not) for a performance boost.

Although it should help sell more Phenoms to those who think the bug was a show stopper.


Here's something entertaining for Vista Phenom users. Apparently from what I've been reading on other forums, SP1 has some kind of built in TLB fix, or they did something on the SP that is effecting k10 performance. And you gotta watch out with some of their benchies, one of the problems I've seen is, that with some bios's on certain boards, I think namely gigabyte, when they disable the TLB fix in the bios, it only disables the fix on one of the cores. Kinda why I haven't updated to a more recent bios yet for my k9a2, worried the same thing would be true for that one as well.
March 2, 2008 11:20:55 PM

I wonder if there would be any way to diable it when SP1 comes out.
March 2, 2008 11:44:34 PM

You could always save the old BIOS and downgrade to it if needed.
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