SOI

[endyen]

There seems to be some confusion about silicon on insulator technology.
Forbes did a very nice writeup about Soitec, the worlds largest manufacturer of wafers that utilize SOI
http://www.forbes.com/home/free_forbes/2005/0919/072.html
It's only one page, but it is very informative.

 

[yipsl]

There isn't any real confusion over SOI. I admit, I didn't follow SOI vs. HK/MK before discussions here, but the thing that people are arguing over is whether it hinders Phenom at 65nm, whether Deneb at 45nm with more pipelines will be as successful as Penryn and what AMD and IBM's next HK/MK 45nm process will bring to the server and desktop market. For the most part, I haven't found any articles that are recent discussing the benefits of SOI alone, which is why it's probable it's being phased out or hybridized.

I trust IBM's research division. Just because Intel doesn't use SOI today does not make it a failure. Still, I think we'll see more hybrids of materials and processes on the desktop in future years, from both AMD and Intel. Perhaps that's why SOI and HK/MK are being blended for future AMD CPU's -- SOI brings cooler CPU's and HK/MK allows for higher clocks with fewer pipelines. Anyways, I'll let the grad students and professionals argue that one. I'm into desktop game and video performance as well as ethical competition in the marketplace that's a win win situation for everyone (so no more Intel OEM rebate dodgy deals).

 

[randomizer]

I trust IBM's research division. Just because Intel doesn't use SOI today does not make it a failure.

It makes Intel a failure coz they couldn't do it

 

[endyen]

An understanding of how SOI is made helps to clear up some misunderstandings.
node is not die thickness
MG/HK and SOI are not mutually exclusive
How it affects capacitance
And therefor why it is less important to Intel
How it might affect the cold bug
What impact it could have on higher speeds.

To be honest, I would also like to see more posts about how stuff works, and less fanboy crap.

 

[yipsl]

To be honest, I would also like to see more posts about how stuff works, and less fanboy crap.

That would require people who actually understand how things work. Outside of the enthusiast PC building area, that seems to be lacking on most message boards. Hence the fanboyism.

I started reading about SOI after jimmy claimed that it's a losing proposition for AMD, and that HK/MK is the way Intel does it right. Then, I found that AMD and IBM's process is actually a hybrid one. Whatever works works. Even Netburst worked and did okay in video encoding, but lousy in games. It all depends on where the product's positioned, how it's marketed and whether it accomplishes what it was designed for.

At any rate, I can't wait for Deneb. Think I'll just get a 780G board and a triple core B3 @ 2.4 gigahertz to hold me over till this time next year when AM3 arrives. Plus, I need to replace the DDR2 667 with RAM that supports Phenom properly.

 

[endyen]

That would require people who actually understand how things work. Outside of the enthusiast PC building area, that seems to be lacking on most message boards. Hence the fanboyism.

I started reading about SOI after jimmy claimed that it's a losing proposition for AMD, and that HK/MK is the way Intel does it right. Then, I found that AMD and IBM's process is actually a hybrid one. Whatever works works. Even Netburst worked and did okay in video encoding, but lousy in games. It all depends on where the product's positioned, how it's marketed and whether it accomplishes what it was designed for.

At any rate, I can't wait for Deneb. Think I'll just get a 780G board and a triple core B3 @ 2.4 gigahertz to hold me over till this time next year when AM3 arrives. Plus, I need to replace the DDR2 667 with RAM that supports Phenom properly.

Jimmy is one of the people who I hope will read the article. Sometimes he seems like a pain in the butt kid I kind of think he'll be okay.
We see HK/MG a lot, but i wonder howmany people know what it means.
Why did they go from low K to high K?
What material does MG actually mean?
Here's a hint. Intel's silicon gate technology on 45nm is the best in the world.

 

[yipsl]

Well, I keep mistyping HK/MK so I only have a vague idea that Intel decided SOI didn't work past 90nm and that they went with a high k process that doesn't involve SOI hybrid.

That's why I came up with the sthick that AMD needs HK-47 to deal with all the Intel fanboy meatbags, except Jedi on the good path just don't like HK's solution to everything.

Arguments over the best design, or SOI vs. HK/MG etc. all come down to real world tests and something didn't work quite right with Phenom on the desktop, though it's server equivalent without the errata should do well.

Intel has the best real world benchmarks right now, but outside of the enthusiast area, AMD can do okay. In the end, Intel got past Prescott and AMD will get past Phenom. Too bad AMD has to engage in price cuts and layoffs.

 

[JAYDEEJOHN]

The leakage issues from heat burst, and a poor IPC all contibuted to Intel going/looking to HK/MG or something thatd pervent the leakage. Wonder how a C2D would run strictly using SOI?

 

[Reynod]

I find the topic interesting so please post some more information about SOI and Intel's current process.

 

[jimmysmitty]

Jimmy is one of the people who I hope will read the article. Sometimes he seems like a pain in the butt kid I kind of think he'll be okay.
We see HK/MG a lot, but i wonder howmany people know what it means.
Why did they go from low K to high K?
What material does MG actually mean?
Here's a hint. Intel's silicon gate technology on 45nm is the best in the world.

Not much of a kid but yea I am ok.

I look at it this way, SOI had potential but is obviously going to hit issues at either 45nm or beyond hence why AMD is going SOI 45nm and then HK/MG on 45nm later.

I do know that the reasoning to move to high k is to help control leakage beyond 65nm. Now the MG is based on Hafnium instead of Silicon. It gives the same properties but can be streached thinner with less leakage.

I will read on the article a bit more when I have time.

 

[JAYDEEJOHN]

One way to put it is, it has less friction, allows the electrons a better flow, and does so using a lighter process, or thinner, thus allowing for a overall smaller process

 

[Mathos]

Actually from what I understand, from AMD's own website and tech stuff. 45nm Shanghai/Deneb is suppose to be a SOI/LowK metal gate hybrid process.. They're suppose to be using a lowK germanium transistor process on the first 45nm parts then moving to IBM's HK/ metal gate after that.

 

[spoonboy]

There seems to be some confusion about silicon on insulator technology.
Forbes did a very nice writeup about Soitec, the worlds largest manufacturer of wafers that utilize SOI
http://www.forbes.com/home/free_forbes/2005/0919/072.html
It's only one page, but it is very informative.

Ive got to hand it to you, somehow you've started a thread in the cpu section where the first 6 replies were actually sensible! my word such restraint is unheard of around here lol.

Cheers for the article link.

 

[Reynod]

We just need one of those engineering types to translate one of the tecky articles into something meaningful so we can understand it.

I for one need some pictures ... just still ones ... no sound or moaning needed thanks.

A comparison would be good.

With the huge headroom of the current Intel process I would imagine they are probably having to render some of the good units (cripple them) just to make celery and low end / small cache chips.

I can't recall anyone posting a conroe or penryn yet that wouldn't clock to 3 Ghz at least ... most without a voltage boost. Please correct me if I have missed a number of them ??

It has got to tell you a lot about the quality of their process.

This seems to be where poor old AMD has failed ...

Still ... providing the layoffs don't include the people making the chips (not the telephone sanitizers / marketing team) they may yet get there.

I must admit it is good that the thread is very civil ... all the best to each of you !!

 

[kg4icg]

Just one word of thought people. Intel didn't go to HK until the 45nm process. All C2d 65nm were all SOI based. So someones question on I wonder how Intel would just run on SOI? Take a look at the Q6600, and you will have answered your question.

 

[JAYDEEJOHN]

It isnt SOI. Just read the link from the OP. From what I remember, its a pure silicon based process, cant remember alot about it tho...Strained silicon was used. Heres something thats older, from '06 I believe, but still stands today. "What about other manufacturers%u2019 use of %u201Csilicon on insulator%u201D (SOI)?
Intel%u2019s superior transistor performance and leakage have been achieved by meticulous engineering of %u201Cbulk CMOS%u201D techniques, which offer the highest performance and best value to our customers. SOI adds substantial costs and complexity to the process. A comparison of published transistor switching speeds shows Intel%u2019s bulk transistors to have faster switching speeds at comparable leakage currents compared to the best published numbers on SOI transistors. A more troubling issue is that SOI has higher %u201Cthermal resistance%u201D than bulk CMOS. As a result, SOI transistors are forced to run at temperatures higher than necessary. Higher operating temperatures could cause long-term reliability problems." That was their evauluation in '06 on SOI, and it hasnt changed any

 

[kg4icg]

If it isn't then why would Intel list the Q6600 as SOI on there spec sheet. HK didn't start until the 45nm process.

http://www.intel.com/technology/architecture-silicon/65nm-technology/index.htm?iid=tech_arch+body_65nm

strained silicon process not soi my bad

 

[JAYDEEJOHN]

NP. Im just glad to read and learn about this process as well. I dont think SOI has completely played itself out, but its getting close. One thing that I read was that AMD plans on going with a different litho process, which will make the transistors much more efficient, which if they pull it off, then using SOI wont hurt them as much, tho eventually theyll have to go HK/MG

 

[Mathos]

Ok, The difference between Intel's Strained silicon CMOS, and AMD's Strained Silicon SOI.

The main difference is that prior to 45nm Intel was using a complementary metal oxide semiconductor based transistor on a strained silicon wafer process. http://www.intel.com/technology/magazine/silicon/tri-gate-transistors-0806.pdf
you can see a picture of the transistor they use on page 4. They modified that with a highK metal stack at 45nm to get their highK metal gate technology.

AMD uses a Silicon on Insulator based transistor instead of CMOS. I can't remember where exactly the pics are I use to have, http://cycho.org/research/blog/

That link also covers a lot of the differences well too.

 

[endyen]

Not much of a kid but yea I am ok.

I look at it this way, SOI had potential but is obviously going to hit issues at either 45nm or beyond hence why AMD is going SOI 45nm and then HK/MG on 45nm later.

I do know that the reasoning to move to high k is to help control leakage beyond 65nm. Now the MG is based on Hafnium instead of Silicon. It gives the same properties but can be streached thinner with less leakage.

I will read on the article a bit more when I have time.

Please do. Then you may understand that SOI is just a sublayer built into the wafer. It can be there @ any node, and with any type of transistor (it is better with nodes <130nm however).
AMD may stop using SOI in 09, but only because it would require a rework of ATI's design system. Thier HK/MG will most likely be on SOI wafers.

As to the hafnium, well, no, the hafnium is added to the gate oxide. http://www.betanews.com/article/Intel_Reinvents_the_Transistor/1169872301. It has a higher insulation value, at a thinner cross-section. With a thinner cross-section, the voltage from the gate is able to supply more force to push electrons/wholes to the drain. The better insulation allows the gate to hold it's voltage better.
The "metal gate" uses nichel, in it's silicon because silicon alone would not have enough potential to properly trigger source to drain flow. ( at current levels that Intel's process can achieve) That metal gate is actually NiSi.
Without the metal gate, AMD does not need HK. They can incorporate a slightly higher insulation factor in thier gate oxide by including nitrogen in it. This would allow them to thin down the gate oxide to the level they need for thier process's potential.
I would expect that to allow better power saving rather than much faster speed.

 

[pausert20]

Just one word of thought people. Intel didn't go to HK until the 45nm process. All C2d 65nm were all SOI based. So someones question on I wonder how Intel would just run on SOI? Take a look at the Q6600, and you will have answered your question.

I will say this again. Intel has never used SOI in any production processor. That of course includes the Core 2 Duo's... Your first statement is true. Intel did not incorporate High K (Hafnium Oxide) as part of the Gate structure. For High K to work they also had to move to a metal Gate.

The Q6600 still used SiO2 as the dialectric in the gate slimmed down to ~5 atoms thick or 1.2nm. You cannot get thinner without leakage increasing unacceptably.

From Intel's site on SOI: Silicon-on-insulator (SOI) – SOI refers to the use of a layered silicon-insulator-silicon substrate on which transistors are built, rather than a simple (bulk) silicon substrate. Some companies claim to get some performance and/or power benefits from SOI over bulk silicon. Intel’s analysis shows that such benefits, if any, are marginal, and do not justify the substantial cost increase of SOI wafers. Intel has never used, nor does it plan to use, partially depleted SOI (PD-SOI) that others are using. There is another type, however, called fully-depleted SOI (FD-SOI) that is under investigation at Intel and is not being used by any chip makers today.

 

[endyen]

We just need one of those engineering types to translate one of the tecky articles into something meaningful so we can understand it.

I for one need some pictures ... just still ones ... no sound or moaning needed thanks.

A comparison would be good.

With the huge headroom of the current Intel process I would imagine they are probably having to render some of the good units (cripple them) just to make celery and low end / small cache chips.

I can't recall anyone posting a conroe or penryn yet that wouldn't clock to 3 Ghz at least ... most without a voltage boost. Please correct me if I have missed a number of them ??

It has got to tell you a lot about the quality of their process.

This seems to be where poor old AMD has failed ...

Still ... providing the layoffs don't include the people making the chips (not the telephone sanitizers / marketing team) they may yet get there.

I must admit it is good that the thread is very civil ... all the best to each of you !!

Sorry, no pictures, just a little info.
Like all wafers, Intels bulk silicon is made by growing silicon crystal. In any process like that, you are going to get some bad spots, where the structure is not quite up to snuff. The structure is usually best at the center, not as good further out.
I'm not familiar with how Intel's strain process works, but it ia also likely to be a source of small flaws.
At 45nm, Intel is using a double exposer litho process. This can also cause transitor failures.
Once they start the litho process, the wafer is masked and washed and baked, masked and washed and baked, again and again. The smallest speck of loose silicon or dust can damage a transistor.
You may have seen a comleted wafer. You may have noticed that while the transistors cover the whole wafer, many on the outside look like they are not complete chips.
Just a few examples of where celerons come from.

 

[endyen]

NP. Im just glad to read and learn about this process as well. I dont think SOI has completely played itself out, but its getting close. One thing that I read was that AMD plans on going with a different litho process, which will make the transistors much more efficient, which if they pull it off, then using SOI wont hurt them as much, tho eventually theyll have to go HK/MG

It's called immersion lithography. It helps with refraction, so that new light is not required. Intel is using a double exposure process, but there isn't anyone else around who could pull that off and still have reasonable yields.

 

[endyen]

If anyone is interested in a little history, this is my favorite article
http://www.pldos.pl/bogus/hardware/procesory/intel/i4004/ffaggin_interview.htm
It's an interview with the inventor of silicon chip technology.

 

[JAYDEEJOHN]

I was wondering, since theyre working side by side with IBM going towards the HK/MG process, AMDs name has come up with the immersion lithography of theirs.... IBMs that is