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If Nehalem = FSB 3200...

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Will this be available to the desktop market? Having looked up Intel QuickPath Interconnect on Wikipedia, it has this to say:

Initial Nehalem Implementation uses a 20-bit wide 25.6 GB/s link (as reported in the Intel Nehalem Speech on IDF). This 25.6 GB/s link provides exactly double the amount of theoretical bandwidth as Intel's FSB 1600 used in the X48 Chipset.

I wonder if Intel will deliver on this hefty promise. I also wonder if anyone else feel as stupid as I for buying a Rampage Formula last month...

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Message edited by Captain Fwiffo on 05-05-2008 at 05:24:25 AM
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Look at the bandwidth of AMDs Hypertransport. Version 2 does 22.4 GB/s and Version 3 will reach 41.6 GB/s. Looking at that, Intels promise doesn't look that "hefty" anymore. I think they will deliver.

Reply to Slobogob

Captain Fwiffo wrote :

Will this be available to the desktop market? Having looked up Intel QuickPath Interconnect on Wikipedia, it has this to say:

Initial Nehalem Implementation uses a 20-bit wide 25.6 GB/s link (as reported in the Intel Nehalem Speech on IDF). This 25.6 GB/s link provides exactly double the amount of theoretical bandwidth as Intel's FSB 1600 used in the X48 Chipset.

I wonder if Intel will deliver on this hefty promise. I also wonder if anyone else feel as stupid as I for buying a Rampage Formula last month...


Remember that Intel will be going with an IMC at the same time.
Historicly, the main user of the FSB has been the memory controler.
Throwing in a highspeed interface then will be like building a high speed 23 lane highway between Gnome and Anchorage. It could well be usefull in the future, but for today?
For servers, it will see a lot more use, in chip to chip transfers. Even there, the burst rate will be helpfull, but it will be a long time or a lot of chips before that bus is full.

Reply to endyen

This is an odd question because I don't fully grasp the concept of a point to point interconnect rather than front side bus, but will this allow Intel to prevent their CPU's from being overclocked? I mean I feel real dumb for asking but couldn't this allow them to lock the "FSB" as well because the memory controller is on die?

Reply to cmmcnamara

yes but in say case like amd....you can just increase the ratio for the ram speed connect with the imc to overclock ram...and increase the hypertransport (ie intels quickpath) link speed for your other bus which can over clock the cpu....think i got that right....been over clocking intel lately. anyways u get the general idea.

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Reply to atomicWAR

Intel will definitely deliver and it won't impact overclocking.

If you want to learn more about Nehalem, I'm compiling as much information as I can find about it here... www.nehalemnews.com.

I'll be writing an editorial this week on how you will most likely overclock Nehalem.


Message edited by virtualrain on 05-05-2008 at 11:05:04 PM
Reply to virtualrain

Slobogob wrote :

Look at the bandwidth of AMDs Hypertransport. Version 2 does 22.4 GB/s and Version 3 will reach 41.6 GB/s. Looking at that, Intels promise doesn't look that "hefty" anymore. I think they will deliver.



Dude that 41.6GB/s is for both directions meaning that its really 20.8GB/s per direction. So if this holds true to Intel than the 25.6GB/s will mean 51.2GB/s total bandwidth. Of course Intels may work different and we may not truly know what it can do until it is released.

I just wounder what it will mean for 2x Quickpath. Does it mean double the theoretical bandwidth? Its hard to tell. I could only imagine what that amount of memory bandwidth could do in memory sensative programs. Of course it will effect the other items such as PCIe and such too.

One downside to HTT3 is that there is yet a chip out that can truly use that much bandwidth and is limited (for some reason) to a bit slower speeds hence the 2GHz NB speeds on the Phenoms. Maybe that will change with their 45nm steppings but its hard to say at this point and time.

Whats really interesting is how Intel and AMDs connection interface differs. Each has their own abilities. AMDs HTT has full 32bit links while Intels has 20bit. AMDs is at 2.4GT/s where as Intels is at 6.4GT/s. It will be interesting to see which performs better in each area.

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Reply to jimmysmitty

Intel's architecture will be 3 channel vs the current 2. So each channel only has to rise about 1.33x over current channels for capacity. That's very doable with DDR3. 1600x1.33 <= 2200. Why would that be a problem today? You can overclock to 2000MHz with X48 with a little effort.

Or to put it simple 800MHz dual channel (1600) has to become 1066MHz tripple channel (3200).


Message edited by Andrius on 05-06-2008 at 02:35:33 AM
Reply to Andrius
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