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Q? - CPU, RAM, Quad pump, multiplier, DDR, and FSB ratios

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May 20, 2008 3:03:00 AM

Can somebody unscrew my brain? So I've been searching the forums and Google and have ended up with two camps of thought on how to match ram with a cpu. As well, I have some fundamental questions about CPU and RAM jargon.

Ok, so camp 1, and I think this is incorrect compares fsb you see advertised on cpu, ram, and mobo boxes and that dual channel effectively doubles the mhz of the ram. So, if you had a 1600mhz fsb motherboard it could host a 1600mhz fsb intel cpu and 1600mhz fsb ram at a 1:1 ratio OR 1600mhz cpu and 800mhz ram running in dual channel for an effective 1600mhz fsb giving a 1:1 ratio.

Now, I don't believe that is correct, what I FEEL is closer to correct would be the second camp of thinking.

There is a base fsb. For the example above, 1600mhz fsb cpu is "quad pumped" - i have a Q about that later - meaning that its actually a base fsb of 1600/4 = 400mhz. if we had 1600mhz ram, it is ddr so it has a base fsb of 1600/2 = 800mhz. That would mean that the cpu to ram ratio is 1:2. If we used 800mhz ram it is 400mhz fsb and the ratio would be 1:1.

In my case, I have 1333mhz wolfdale and 800mhz ram. using the above that puts me at 333:400. If i overclock by 20% on the CPU, that would put me at 1600mhz cpu: 800mhz ram or 400:400 (1:1) true fsb, totally synchronized.

COMPLETELY CLUELESS TECH QUESTIONS BELOW
Ok, so now what I'm REALLY confused about. What is Quad pump? Is it communicating with the ram 4 times per clock cycle, what is it doing that makes it 1600mhz. What is a multiplier, really. I know it "multiplies" the mhz to get an effective clock rate, but what the hell is the mechanic behind a multiplier, it can't just magically multiply clock speed right? What is dual data rate? It means the ram does SOMETHING on the rise and fall of a clock cycle but WHAT Is it doing? How does the quad pump + multiplier for a CPU relate to DDR for RAM? I guess I am asking what determines HOW OFTEN the RAM and CPU communicate based on FSBs and what are they doing during all those extra clock cycles that they don't communicate, especially if the above formula is correct; that a 1600mhz cpu would be in sync with 800mhz ram. Lastly, I ran into one article that mentioned another factor I haven't taken into consideration which is an increase in bits sent per cycle. I cannot recall the specifics or find the article but the gist of it was factoring in that some older model of CPU sent 4bits per cycle or per pump, i do not recall, and now some send 8bits.

If anyone can provide any clarity on these issues I would be exceedingly grateful.

Thanks for your time,

Chad
a b à CPUs
May 20, 2008 7:25:15 AM

The "quad pumping" is on the FSB. Data can be sent (i believe) 4 times per physical clock. Some boards will tell you the FSB speed, others the, i believe they call it, "rated" FSB.

I'm not 100% on this so...
May 20, 2008 11:07:04 AM

Awesome, thanks for the input man. Well after another hour and a half of searching, I ran into this article:
http://icrontic.com/articles/core2_fsb_explained
So if you were curious about any of the above I mentioned this covers a lot of it.

Now my only questions are these.

If data is sent 4 times per clock cycle from the cpu and the ram gets data twice per clock cycle, if running sync at 400:400, how can they be truly running sync? Does it not seem that there are two extra transmissions, or pumps from the cpu, per clock cycle that the ram wouldn't get right away? Is it buffered somewhere between pumps in the cycle?

Also, I still don't understand the physical / logical nature of a multiplier on a CPU. What does a multiplier do that makes a cpu able to run at "1600mhz"? Why shouldn't there be no/low multiplier and just a really high frequency? I realize some OCers lower the multiplier to get higher frequency which means higher bandwidth, so why isn't this approach taken by the CPU manufacturers (i'm sure its a good reason)?
Related resources
a b à CPUs
May 20, 2008 12:21:52 PM

I can answer 1 question although technically there is more to it, but simply.....The FSB is the speed at which everything communicates over your motherboard. Imagine your motherboard, or even look at it. As you raise frequencies, you start having all kinds of technical issues trying to move signals around the gigantic mess and maze of pathways on your motherboard. The CPU is extremely small, compact, and streamlined compared to your motherboard. It's by far better able handle and run at much, much higher frequencies.
a b à CPUs
May 20, 2008 12:54:04 PM

chadwickvm said:
If data is sent 4 times per clock cycle from the cpu and the ram gets data twice per clock cycle, if running sync at 400:400, how can they be truly running sync? Does it not seem that there are two extra transmissions, or pumps from the cpu, per clock cycle that the ram wouldn't get right away? Is it buffered somewhere between pumps in the cycle?

in dualchannel mode two sets of memorysticks are used in parallel, so that evens it up. so you have dual data rate memory in dualchannel making it effectively equal to 'quadpumped' cpu. hope that helps... :pt1cable: 
a c 87 à CPUs
May 20, 2008 1:06:03 PM

Kari said:
in dualchannel mode two sets of memorysticks are used in parallel, so that evens it up. so you have dual data rate memory in dualchannel making it effectively equal to 'quadpumped' cpu. hope that helps... :pt1cable: 


Uhmmm, not as far as I know.
a c 87 à CPUs
May 20, 2008 1:06:30 PM

Quote:
If data is sent 4 times per clock cycle from the cpu and the ram gets data twice per clock cycle, if running sync at 400:400, how can they be truly running sync?


Does the CPU communicate with the ram? (stick to current Intel systems for those of you who know the answer...) Heres a block diagram to help you out.

http://www.firingsquad.com/media/article_image.asp?fs_a...

The FSB connects the CPU to the northbridge, not the ram. When the CPU wants a bit of info from the RAM, it sends the request to the northbridge. It then waits for the answer, or works on other projects. The northbridge takes the request and retrieves the info, then sends it back to the CPU. (This is why Intel CPUs have such large amounts of L2 cache. This is a process that takes many CPU cycles to complete, so they load as much as they can into the L2 cache. AMDs CPU have the memory controller on the CPU itself, and can get things from memory much faster.)

What I'm trying to say is that they don't need to be in sync, they don't talk to each other. The FSB needs to be higher then the memory speed, because more then just memory requests go through the FSB. For example, if the CPU needs to send information to the video card, that would go to the northbridge also to be sent to the VC.

Quote:
Also, I still don't understand the physical / logical nature of a multiplier on a CPU. What does a multiplier do that makes a cpu able to run at "1600mhz"?


I think you're still confused. The FSB can only run so fast. The devices that connect to the northbridge can't run at GHz speeds, so why make it run that fast? I'm not sure why a multiplier is on the CPU, I assume its simply a clock generator set to run at X times a given input frequency.

Quote:
I realize some OCers lower the multiplier to get higher frequency which means higher bandwidth, so why isn't this approach taken by the CPU manufacturers (i'm sure its a good reason)?


Perhaps its just because its so late for me, but I don't understand. OCers do lower the multiplier so that they can increase the FSB to higher frequencies. I don't understand what you mean by CPU manufactures. What do you want them to do?
a b à CPUs
May 20, 2008 1:19:12 PM

no?
May 20, 2008 3:00:19 PM

chadwickvm said:
If anyone can provide any clarity on these issues I would be exceedingly grateful.

Dual data rate, 4 clocks, multiplier, cycles,.............etc
you can google and get very deep explanation which I doubt you or me will understand
It is enough to understand how these things work together in a stable way
You have three different things
First : Multiplier:
It works with FSB frequency to detemain processor speed
AS an example E8400 comes at default FSB=333MHZ and mutiplier 9
So processor speed will be 9X333=2997MHZ i.e 3 GHz
If you want to OC to 3.6 GHZ you have to change FSB frequency to 400
9X400=3600MHz
This will lead us to the second point
Second: FSB & 4 clocks
Due to the processors 4 clock technology if FSB is working at 400MHz frequency
the resulting FSB speed will be 4X400=1600
Now your motherboard must support FSB 1600 if you want to OC to 3.6 GHz
I have to say here if your mobo supprts 1333 only you should not have a problem
cause when you increase FSB frequency you have to increase voltage
By icreasing voltage you are pushing FSB to higher speeds
And you might be able to run it at 2000 even(Be aware of resulting high temps)
Now let's see how RAM will work
Third: DDR frequency
DDR frequency must be synchronised with FSB, How??
The very well known rule of DRAM:FSB ratio 1:1 is the easiest way
and it is valid when DRAM frequency = FSB frequency X2
However 1:1 is not the only ratio valid
They can work together under different ratios
1:1, 6:5, 5:4, 4:3, 3:2, 8:5, 5:3, and 2:1
Depends on mobo capability and bios
And the general equation is
DDR speed=2XFSB speed X N ( N is the ratio, 1/1, 6/5,....etc)
If you set your FSB=400
And your DDR is 800
they will be working 1:1
Clear ???
You can see it here



In this schedule you'll find how ram will work using different ratios
other than 1:1 under different FSB frequencies



And here you can see how RAM can work under different ratios
in full compatibility with FSB



You can see FSB=430
First option avalable for RAM 861
Itis clear running 1:1

The second option 1033 Ram is running using ratio 6:5
equation will be
DDR=2 X 430 X6/5 =1032

If you choose this option you must have DDR2 1066 sticks
Or have to OC your sticks by increasing DDR voltage
Personally I don't like to OC memory sticks

Here is a more detailed schedule



These are more complicated diagrams
You can have an idea how Proc/FSB/RAM communicate





Hope this clears some grey areas
:sol: 

May 20, 2008 9:50:02 PM

You guys all did an awesome job helping to explain the situation. Special kudos to Kad for the visual aids. Yep, I now know the basic concepts of it. I now have different questions that I will take my own time to research as they are concepts, as Kad mentioned, that are probably beyond the scope of this topic. Also, 4745454b, thanks for the interesting post. It made me very curious as to the effect of having a north bridge as opposed to an integrated memory controller. Lastly, I'm going to start looking at the actual physical explanation of what a clock cycle is and how the rest of the systems use it. Thanks again for the help everyone. I almost hate to see this post get buried just because of the slew of good information in it.
!