Kari is correct to allude to channeling of memory bandwidth, while not precisely stating the single and double channel operation of memory modules. When installed in Pairs DDR2 will run as dual channel at 128bit, installed as singles they run in single channel and at the 64 bit data rate. No one is saying anything about pin outs; the material thing is the bandwidth and throughput. Anyone quoting Jedec should go there and see what they are quoting.
http://www.jedec.org/download/search/JESD208.pdf
Other info-
http://www.cooltechzone.com/index.php?option=content&task=view&id=357&Itemid=0
http://www.crucial.com/kb/answer.aspx?qid=3773
"While DDR has a limited clock rate, the evolutionary changes to DDR architecture enable DDR2 to achieve speeds beyond that of DDR, delivering bandwidth of 5.3 GB per second and beyond! Because DDR2 is able to operate with faster bus speeds, your memory doesn't hold back the performance of your processor."
Yes from wiki argue with their grammar not their math, easily digestable for genY:
“Computation
Theoretical maximum memory bandwidth is typically computed by multiplying the width of the interface by the frequency at which it transfers data. This is also referred to as the burst rate of the interface, in recognition of the possibility that this rate may not be sustainable over long periods (i.e., the throughput may be less than the theoretical maximum memory bandwidth).
The nomenclature standards often differ across memory technologies, but for commodity DDR SDRAM and DDR2 SDRAM memory the computation is:
Base DRAM frequency in MHz
Memory bus width. Each DDR or DDR2 memory bus is 64 bits wide.
Number of interfaces. Current computers typically use two memory buses in dual-channel mode for an effective 128-bit bus.
Number of bits per clock cycle. This is "2" for both these "dual data rate" technologies.
So a recent computer system with a dual-channel configuration and two DDR2-800 modules, each running at 400 MHz (actual bus speed, which is half of the nominal speed of 800 MHz, but in DDR2 is twice the memory's actual clock of 200 MHz), would have a theoretical maximum memory bandwidth of:
(400 MHz) * (2 interfaces) * (64 bits/interface) * (2 bits / s) = 102,400 Mbit/s, or 12,800 MB/s, or 12.8 GB/s.
The naming conventions of DDR, DDR2 and DDR3 modules typically cite a nominal MHz rating (e.g. DDR2-1066) which is not the bus speed or memory speed, but the number of transfers possible per second, and an additional nominal rating of the maximum throughput of the module (e.g. DDR2-800 is also called PC2-6400) which reflects the megabytes per second the module can theoretically transfer. So with this in mind, the above computation can be simplified as having two PC2-6400 modules in a dual-channel 128-bit configuration, or 2 * 6400 MB/s.
As of 2007, advanced personal computers and graphics cards use even more combined buses than dual-channel, and combine four (e.g. Mac Pro), five (e.g. nVidia 8800GTS), six (e.g. nVidia 8800GTX) or more sets of 64-bit memory modules and buses to reach 256-bit, 320-bit, 384-bit or greater total memory bandwidth.”
If DDR2 mods are not placed in pairs of like type the mods will not operate in dual channel 128 bit rate but at a single channel rate 64 bit rate. They are made to operate this way. The single channel amounts to the bandwidth and throughput of DDR.