News: 8-16 chip cores can mean slower supercomputing

[dragonsprayer]

looks like we are going to hit the wall this year or next! report released by USG sandia national labs

http://www.sandia.gov/news/resources/releases/2009/multicore.html

intel moved to the built in memory controller at the perfect time - few realize why. Dual quad debate is over with i7. The octo core debate will start soon vs the dual octocore.

this means that multi core and core speed will stop at memory bandwidth limits. >my translation


the 8088 lasted for 15 years the i7 16 core cpu might still be a top performer in 2020?

news link:
http://www.google.com/search?sourceid=navclient&ie=UTF-8&rlz=1T4GGIH_enUS236US236&q=CPU+cores%2c+more+not+always+better



i explain intels perfect timing later!

 

[spuddyt]

wouldn't it be a hexadeca core?
and anyway I strongly suspect it won't be a factor for home computers for quite a while yet....

 

[dragonsprayer]

thank you - i do not have that much time to look it up
i am old out of match (math)class for long time <spelling too and plus i need glasses

 

[blackpanther26]

I think one way is to add another memory buss or Make two piplines for the memory.

 

[dragonsprayer]

the problem is latencies:

1) it took quiet a while to get from dual to triple channel - intel would have added 3rd channel years ago

2) while memory speed is increased latencies have pretty much increased proportionately

well know the 4th dimm induces latencies - that is, it slows down all 4 channels. that is why you only add 2 sticks to a ddr2 system - well if you me and you build super fast systems for traders and gamers


adding another mem controller would heat up the cpu too much- moving it out of the cpu would reduce the bandwidth. maybe a staggered dual controller set up with on nb and one built in?

maybe i should Patent that? build me a prototype someone!

 

[blackpanther26]

I was thinking about a dual memory controler lane. Much like Hyper threading. Or have one memory controler on the CPU and the other in the NB.

 

[dragonsprayer]

i just patented the dual memory controller on last post!
lol!

what if you send memory from one controller to one bank of cores and one to a second bank of cores

my second patent of the night

 

[dattimr]

i just patented the dual memory controller on last post!
lol!

what if you send memory from one controller to one bank of cores and one to a second bank of cores

my second patent of the night

AMD introduced something like that with K10: it has two 64-bit memory controllers, one for each memory channel and pair of cores. It's called "unganged mode" in the BIOS. You just infringed their patent, beware the lawsuit of unfair practices coming your way! LOL.

 

[dragonsprayer]

no mine is one on the core, and one on nb

core mem controller goes to to 2 cores for large data packs and the nb runs the little crap

millions await no more slaving over system building and tech support!

 

[dattimr]

Probably there would be latency issues. Imagine all the sync that would need to be done in order to guarantee that the memory would be accessed at the same time by both the controllers. Besides, what's the point of going the IMC route just to offload it to the NB again? This is not a critic to your ideia, but it simply makes no sense and it's pretty clear it's not gonna happen, since Intel also adopted the IMC. Anyway, Tri-channel + more QPI/HT links + more memory controllers (like the AMD solution) + NUMA should take care of that. Sandy Bridge is said to focus on "core interconnects", so they'll probably rework everything we know about how CPU cores communicate among themselves. But I'm no CPU designer and can't talk that much about it.

 

[jimmysmitty]

You know this is just a prediction. Just like Bill Gates "We will never need more than 640K of RAM" prediction. He was off. By a lot.

By the time this all comes to frutition some company (be it Intel, AMD or IBM) will have something new. Something that will increase CPU power. Much like GPUs hit a limit with the pipelines and moved to Shader processors instead.

 

[dattimr]

Good ol' smart uncle Bill never said that, actually. It's just one of those things that people like to attribute to "key people" in order to create myths. Here is his response: "I've said some stupid things and some wrong things, but not that. No one involved in computers would ever say that a certain amount of memory is enough [...] But even 32 bits of address space won't prove adequate as times goes on [...] Meanwhile, I keep bumping into that silly quotation attributed to me that says 640 k of memory is enough."

Besides, there's no actual record of how and when he said that. It's BS.

 

[jimmysmitty]

^Ahhh. I never bothered to look into it.

I am willing to bet though that he said something near that that started it.

Anyways, my point stands. Things change. We hit memory walls with SDRAM so then came DDR. Now we have DDR3 and DDR4 planned for 2011, same time as Intel plans its 22nm CPUs.

 

[dattimr]

Sorry, but it's just that I like the "mythbusting" role once in a while. But I also thought it was true, until some time ago. Probably he said something that left someone angry enough to misquote him with something that stupid. Of course it would be remembered, since it was Geek Overlord Gates who said it.

Yeah, tech spins. Also, RAMBUS never dies. You never know.

 

[blackpanther26]

What if you have 2 memory lanes running to one memory controller? would that help do you think? I'm sure Intel or AMD will figure somthing out.

 

[jimmysmitty]

I am sure they already have.

I have seen an article (need to find it) where Intel has found a way to incorporate fiber based lines into silicon that allow full light transmission, not in pulses like current fiber technology. It would be interesting to see a CPU that could process at the speed of light.

And that has more than just CPU applications. Imagine is all the traces on a mobo were made of fiber instead of gold/silver or whatever materials. It would allow for much faster communications amoung components.

but thats probably about 10 years away. Still interesting stuff.

 

[gamerk316]

Theres been talk of running out of bandwith on the Sharmed Memory Bus for some time now. We'll have to wait and see...