As my new best friend Bilbat learnt me this morning.
At 1066, a ram bus cycle, rising edge to rising edge, is 1000/1066, or .936 nanoseconds; at 1333, it is 1000/1333, or .75 nanoseconds; (CAS)5 x .936 = 4.68 nanoseconds per memory transaction; (CAS)9 x .75 = 6.75 nanoseconds
But in your case it would be 1000/800 = 1.25 ns * 4 = 5 ns per memory transaction.
honolululu - Not disagreeing with you in end result.
Math alittle off but comes out in the wash. @ Clock freq for DDR2-800 is 400 MHz
which is 2.5 nansseconds. With DDR that means 1 transaction on leading edge and on transaction on laging edge. equivalant to SDR runing at 800 MHz. The 2 in DDR2 doubles that as the two sticks are effectively operating in Parallel - hense Fronside bus = 1600.
Overall excellent comparrison. Don't forget that while the first digit(4-4-4-12) is most important the other numbers also effect performance
I made an awesome choice, and I wasn't even trying for it...
(note that the review I linked is an older one, and states that the ram I have runs at 2.10v for the 800MHz 4-4-4-12 timing - the ram has since been upgraded and runs stable at that speed and timing at 2.00v)