I have been studying up on Intel's upcoming "Nehalem," or "Gainestown" Xeon 55XX processor (though I need to do a LOT more!).
I was wondering about the chip's use of caches.
Now I understand that the QuickPath technology won't keep the CPU starved for data and tapping its foot like now, as data is read from the hard drive, transferred to RAM and finally transferred to the CPU via a FSB. I also understand Nehalem will use an L3 cache of 8MB.
But why the relatively small L1 and L2 caches? (64K L1 cache and a 256K L2 cache.)
What would be the harm in these caches being larger in a chip in the year 2009?
Wouldn't there be a performance increase if they were larger, say 512K L1 and 2MB L2? Because they're "on-die" and I would assume much faster even than the QuickPath accessed RAM and especially L3 cache memory?
The CPU would never be "starved" and tapping its foot waiting to be fed.
Any help understanding this is appreciated.
defender
P.S. Intel has announced that Nehalem will eventually gain 8 cores. Does anyone think they will use the 32nm process then, or the same 45nm metric?
I'm wondering about socket compatibility and the possibility of upgrading to 8 core processors at a later time...
.
.
I was wondering about the chip's use of caches.
Now I understand that the QuickPath technology won't keep the CPU starved for data and tapping its foot like now, as data is read from the hard drive, transferred to RAM and finally transferred to the CPU via a FSB. I also understand Nehalem will use an L3 cache of 8MB.
But why the relatively small L1 and L2 caches? (64K L1 cache and a 256K L2 cache.)
What would be the harm in these caches being larger in a chip in the year 2009?
Wouldn't there be a performance increase if they were larger, say 512K L1 and 2MB L2? Because they're "on-die" and I would assume much faster even than the QuickPath accessed RAM and especially L3 cache memory?
The CPU would never be "starved" and tapping its foot waiting to be fed.
Any help understanding this is appreciated.
defender
P.S. Intel has announced that Nehalem will eventually gain 8 cores. Does anyone think they will use the 32nm process then, or the same 45nm metric?
I'm wondering about socket compatibility and the possibility of upgrading to 8 core processors at a later time...
.
.