well not sure if ur still there but...
as far as i know for HT wiki the MAX link width is x32, which means it does i bit per 1x which 1x = 1 lane
so 32x transfers 32 bits (imagine 32 aisles with 1 bit traveling through it at a time)
then its double data rate, so it sends on the rising and falling edges of the cycle (watever that means, but basically it doubles the data tranport in one cycle)
then you have the HT frequency which is like 1 ghz 2 ghz or whatever it says (tell you in CPUZ under HT freq)
and finally in goes in and then goes out so that doubles the data traveled so you can multiply it by 2 again, but that is sorta retarded...
so finally we have
1ghz (HT freq) * x32 (this is what you are toggling and at the moment amd processors only have a x16 bit width but we will do that in a different calculation) * 2(double data rate) * 1 byte / 8 bits (there is a 8 bits in one byte, so basically we are dividing by 8 to get the amount of byte transferred) * 2(for both ways *if u want to i wont*) so
1ghz * 32 * 2 * 1/8 = 8 GB/s UNI direcxtional (in one direction)
*2 that for bi derectional which dosent even matter
so max of 16GB/s
so what your toggling is the HT width link which is set ri9ght now to 16 so ....
1 ghz * 16 * 2 * 1/8 = 4GB/s Uni directional
*2 that for 16 GB/s bidirectional
or change it to 4 and 8 for even less bandwidth.. (which is seriously pointless because you want the most amount of bytes traveling for a fastest CPU)
so with 8 its is only 2GB/s and with 4 its 1 GB/s.... which is really pointless
so hope that explains alot, and if u really got what i said you would know what to do with it
if u didnt understand a word then sorry but it is best to leave it alone so at 16x (maximum) so you get the most bandwidth
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