I have a target board with vr4131 processor and K4S561632C-75c samsung sdram, vr4131 has inbuilt sdram controller. Now i have to set the sdram control unit's refresh control register. for that formula what they have given is
Refresh interval = BRF(13:0) × VTClock
Calculate the setting value based on the DRAM refresh cycle count and bus access cycle (each address space/bus hold cycle) that are used. Refer to the CLKSPEEDREG register for the frequency of VTClock.
VTClock =33.2Mhz Refresh cycle count= 64ms/8k (from sdram data sheet) i have to calculate BRF value (14 bits).
if any one have some idea.please help me
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