Can the 2009 MacBook Pro benefit from low latency memory?

Kingston produce "ultra low latency" HyperX DDR3 SO-DIMMs which have CL5. As this is 40% less latency than the more common CL7, would the 2009 MacBook Pro benefit from this extra speed or are its minimum timings fixed? I cannot find any information on this on the web and so I am hoping that someone familiar with the 2009 MBP chipset may be able to comment.

Interestingly, I found two independent reports (one in the US on Apple forums and the other sourced from Korea) that say the new 13" MacBook Pro (mid 2009) runs its memory at 1333MHz if sufficiently fast modules are installed and the memory is reported as DDR3 1333MHz in 'About this Mac'. One said that their previous generation, 2008 unibody MBP would not boot with the same modules, except when one module was mixed with a standard 1066 MhZ module in which case they would run at the lower speed. As 1333 Mhz and faster DDR3 SO-DIMMS are CL9 or worse, then there is no speed benefit (1333/1066 x 7/9 = 0.9726, i.e. the faster-clocked memory is actually nearly 3% slower - if things are as simple as this). However, this does indicate that the 13" 2009 MBP may have a revised chip set.

Any thoughts?
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  1. After a day of research, I am nearer an answer.

    Kingston have four part numbers for their HyperX DDR3 SO-DIMMs 4GB (2x2GB) kits:

    KHX1066C5S3K2/4G and

    The first two are now discontinued and have been replaced by the latter two. As far as I can determine, the pairs are identical apart from their part numbers now represent the raw chip data transfer rate (MT/s) rather than the maximum theoretical memory bandwidth (8533 MB/s).

    The 'X' versions are for specific Intel chipsets that support the Extreme Memory Profile (XMP) extensions to standard JEDEC Serial Presence Detect (SPD) protocol. None of the unibody MacBook Pros use Intel chipsets, Apple having chosen NVIDIA chipsets instead, and so these modules will run instead at their JEDEC programmed rates of 7-7-7-20. In an XMP aware chipset, they run at the advertised 5-5-5-15.

    However, the non 'X' versions do not rely upon XMP and have a default JEDEC SPD setting of 5-5-5-15. Any computer which reads the SPD profile should therefore be able to take advantage of this extra speed. This should be a very significant 40% memory speed increase compared to the mainstream CL7 timings.

    Note that Wikipedia incorrectly states that DDR3-1066 does not support 5-5-5 timings. The table on page 158 of the JEDEC Standard No. 79-3C, clearly shows that the DDR3-1066E 'speed bin' supports CL=5 and CWL=5.

    The final question is do MacBook Pro's read the SPD profile? The NVIDIA MCP79 chipset used in the MacBook Pros claim compatibility with the DDR3 standard and therefore they should. As Mac-certified RAM is sold with both CL7 and CL8 timings this would imply that the SPD profile is read.

    I have ordered my KHX8500S3ULK2/4G from for £75.89 including p&p and VAT on the strength of the above. Until it arrives and I have had chance to test it in my MacBook Pro, I cannot be 100% that it will run with CL5 timings.

    Please reply if you would be interested in the results.

  2. I'm interested. What about the conclusion? Is it possible to gain anything sith CL5 on a Macbook Pro, me hope so!
  3. Well done for asking. The answwer is no. I did memory speed tests before and after and it was very clear that there was no adavantage (to withn 0.3%) :-( That is not to say that things will not change in the future.

  4. Well done with the research! I just want to throw in a comment and say that the importance of memory timings has decreased since ddr2 was introduced. Back in the DDR1-days there was quite big difference between e.g. cl 3-4-4-8 and 2-2-2-5. Higher frequencies will benefit a lot more.
  5. But did it detected the correct timings? (5-5-5-15) Or ran on the default 7-7-7-20?
  6. If you tell me how to check, (under OS 10.62) I will happily oblige!
  7. Sorry, only know how to do this under Windows using CPU-Z.

    I also tried the MemTest86+ 4.00 boot CD, but the memory timmings doesn't show up. Maybe with a future version it will work.

    If I figure out another way I'll post it here.
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