Dual-Channell & FSB: Calculating the bottlenecks

I'll put the key words in bold to aid the quick post skimmers.

I've searched through the faq and did not find anything specific to this.

There are several cases I've wanted to install memory in pairs to achieve dual-channel memory speeds, but I've come across a caveat or two about whether or not this is worth it.

Quick questions:
1. How do I calculate whether or not the FSB is fast enough to take advantage of the memory speeds. I'll see cpuz refer to things like FSB:memory as "1:2", which I'm not sure refers to the memory controller taking advantage of the up and down side of the clock waveform, or if it's saying "give up, we're half the speed we need".

2. How do I calculate dual core beasts? Do they share the FSB, or do they each have their own resulting in double access speed [attempts] to dual ported memory (note, not dual channel).

Forgive me please, my questions may be tripping all over themselves. It's been a longgggg time since I've calculated any of this out during my stint as a DSP software engineer.

I'll be glad to rephrase this in any way you all like.

THANKS!