Core i7 bus aka quickpath

i know most of you are noobs, but im sure there is at least one that knows the answer for this qustions.

ok busses, for intel core 2 extreme

Processor Family FSB
QX9775 4 3.20 GHz 1600 MHz 12 MB 45nm
QX9770 4 3.20 GHz 1600 MHz 12 MB 45nm
QX9650 4 3.00 GHz 1333 MHz 12 MB 45nm
QX6850 4 3.00 GHz 1333 MHz 8 MB 65nm
QX6800 4 2.93 GHz 1066 MHz 8 MB 65nm
QX6700 4 2.66 GHz 1066 MHz 8 MB 65nm
X6800 2 2.93 GHz 1066 MHz 4 MB 65nm

i do understand what 1600 MHz mean(FSB), now what i wanna know is this

Processor Family FSB or intel quick path
i7-950 3.06 GHz 4.8 GT/sec 8 MB 45 nm
i7-940 2.93 GHz 4.8 GT/sec 8 MB 45 nm
i7-920 2.66 GHz 4.8 GT/sec 8 MB 45 nm

whats this FSB 4.8GT/sec for core i7, how much is that in MHz, or better yet what does that mean.

which im not going to get into there??? why not get in there and explain please.

It's not 4.8 ghz it's 2.4 ghz. And the 6.4 gt/sec is 3.2 ghz. Take the gt/sec and divide by two and that's your frequency. It's how fast the quick path interconnect moves data, (i think from the processor to the ram, but I don't know for sure). Right now mine is 7.2 gt/sec, but there isn't a performance difference between that and 4.2 because ram can't handle quick data very well yet (see memory scaling articles).

Actually, it's irrelevant for RAM speed anyways. The memory controller is on a completely separate pathway on i7, and will always allow for full speed access.

Think of it like a freeway. The number of cars you can move per second depends not only on the speed limit (ie, the GHz or GT/sec), but also the on number of lanes. Double the number of lanes, and you've doubled the capacity of the freeway.

At the end of it all no matter what technology or protocols are being used, the key thing you're looking for is the throughput of the bus, which is about 25GB/sec for the high-end Core i7 chips. That's 12.5+ GB/sec in two directions.

This Wikipedia article explains it in detail, noting that:

"The rate is computed as follows:

* 3.2GHz
* x 2 bits/Hz (double data rate)
* x 20 (QPI link width) <--- this is the number of "lanes"
* x (64/80) (data bits/flit bits)
* x 2 (bidirectional)
* / 8 (bits/byte)
* = 25.6 GB/s"

Considering that Hertz refers to cycles per second, "Gigahertz per second" would be cycles per second per second. QPI accelerates!

that makes a complete sense.

ok everything is connected to the Motherboard, north and south bridge as shown in the pic.

on the north bridge that's where the CPU, Ram, And graphics card send buses to so they can connect to each other right.

so no matter how fast or slow the CPU Quickpath is, its not gonna effect the speed of the ram bus, right, because its going to send its data to the north bridge to the memory controller and from there, the cpu will send its bus to read the data correct?

so lets say for example 1333 mhz fsb and 1600mhz fsb, how would a 1600 operate faster? by reading the memory faster than the 1333mhz in the north bridge not the ram it self right? the memory is there in the north bridge it just waits for the cpu to read it, so thats how 1600 is faster.

memory controller some have dual channel and some have triple channel, its determined by the motherboard right not the cpu.

am i still on the right side, or am i going off? please let me know

and really thanks alot for your help guys.

this is really confusing, i was looking at the other motherboard (pretty much im f'd up)

k whats this loool, i see the memory connect with the cpu, no north bridge. only cpu and pci express that are connected to the north bridge, so what was that north bridge talking about?

so there is no bus between cpu and ram, it uses the quick path insted its like having ram and cpu connected to each other no need for bus speed to effect its transfer data speed.

Well QPI and FSB aren't really cross-comparable.

One is quad pumped the other is deca-linked.

ok now i get everything.

in the old motherboards (not core i7), the memory controller was in the the north bridge (memory controller is where the ram data goes to using dual or triple channel), now for cpu to get there, it had to use its FSB to get to the north bridge and then get the memory controller to accesses the ram data.

but in the new motherboards with the new core i7, it have on-die memory controller that is inside the cpu (core i7)

so there is no longer memory controller in the north bridge, its on the separate way on the core i7 it self, so there is no need to use fsb or intelquickpath to get to the memory controller to accesses the ram, because the ram is sending its data right inside the core i7, and insted of using the quickpath to get ram now its used to get to the north bridge to get the other data not including ram.

please correct me if im wrong.

thanks to all who helped me with this.

and i need cjl to confirm on this please.

and if there is something els you guys wanna add, please do so i can know more things about this.

Exactly. AMD uses this same approach as well, as randomizer pointed out.

GT/s is slightly more descriptive, but all it really means is gigatransfers (billions of transfers) per second. So, a 6.4GT/s bus makes 6.4 billion transfers per second. To know how fast the bus truly is, you also need to know how much data is in each transfer. The old front side bus ran as fast as 1600 MHz (1600 million transfers per second, or 1.6 billion), but it was 1/2 the speed of a 6.4GT/s QPI rather than 1/4 the speed if I remember right, since it moved more data per transfer.

All right except for the QDR part - it's true that it was quad pumped, but that means that it was transferring 4 times per clock cycle at 400MHz. The physical clock signal was 400MHz, but it was still transferring 1600 million times per second. That's why they called it 1600MHz effective.

That's true with the i7 too.

after the 6 and 8 core i7's - 25nm die's then ≈15nm die's.