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Difference between multicore and multiprocessor

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November 13, 2009 1:51:21 PM

hi i just started studying about cpus and was wondering whats the difference between multi core and multi processors, how they share cache? the productivity difference etc. thanks
November 13, 2009 2:14:55 PM

The difference lies in that the multicore is multiple cores in just one die. Multiprocessors are multiple dies.
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November 13, 2009 6:57:36 PM

Multi core processors have two cores that can handle executing processes on one chip. Typicaly each core has its own L1 cache and the they will share L2 cahce. These chips are found in PC and Laptops now a days. Multi processors are multiple chips that are pluged into the mother board, each chip with have its own cache and none of it is shared. These are usually used in server applications or for developers. They are not for gaming and most home users (there are always exceptions).
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November 14, 2009 4:29:08 PM

ordos96 said:
Multi core processors have two cores that can handle executing processes on one chip. Typicaly each core has its own L1 cache and the they will share L2 cahce. These chips are found in PC and Laptops now a days. Multi processors are multiple chips that are pluged into the mother board, each chip with have its own cache and none of it is shared. These are usually used in server applications or for developers. They are not for gaming and most home users (there are always exceptions).


thanks but just a bit more in depth what is considered a chip,meaning besides for the pipeline what components make an complete chip because example the memory chip controller is not part of the chip?
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November 14, 2009 4:35:14 PM

By 'chip' he means complete CPU that gets plugged into a socket on the motherboard. On many modern processors however the memory controller is built into the physical die that contains the CPU, like on the i5, i7, and AM2 and AM3 chips.
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November 14, 2009 10:20:56 PM

hunter315 said:
By 'chip' he means complete CPU that gets plugged into a socket on the motherboard. On many modern processors however the memory controller is built into the physical die that contains the CPU, like on the i5, i7, and AM2 and AM3 chips.

thanks but if the cpu component is processing it through a pipeline in what way is it different them just more pipelines ?
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November 15, 2009 2:55:47 AM

shlib92 said:
thanks but if the cpu component is processing it through a pipeline in what way is it different them just more pipelines ?
Conceptually speaking, and from the point of view of the application programs running on your computer, there isn't any real difference between one CPU chip with four cores and two CPU chips with two cores each. Both allow for the execution of four independent instruction streams through four pipelines (I'm going to ignore hyperthreading for the purposes of this discussion).

It makes a big difference to the operating system, though, and similarly a big difference to the motherboard designer. The OS has to manage two separate CPUs and two separate cache hierarchies, and it needs to try to schedule threads for the same process on the same physical CPU chip so that they are more likely to get cache hits (threads in the same process share memory). The hardware designer has to provide a more sophisticated bus infrastructure which can handle cache coherency management and the interchange of I/O data with multiple CPU chips (although in practice most of these kinds of details are usually buried in the chipset).
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November 15, 2009 8:50:29 AM

but in general the main component of a processor is the pipeline so what does it mean when it has more cores, as in what makes it a actual core not just a another pipeline?
thankx
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November 15, 2009 2:40:23 PM

Well the core IS the pipeline alone with a register set to store program state. And in modern processors the L1 instruction cache is usually pretty integral to the core too since it typically stores pre-decomposed micro-operations.

Whether you call it a "pipeline" or a "core" is perhaps just a matter of personal preference - the important thing that it's what's needed to execute a stream of instructions. If it's got 4 o' them thingies then the chip can be running four instruction streams at once.

Where it gets blurred is with hyperthreading, which basically takes one pipeline and gives it two sets of registers so that it can maintain two discrete program states. The idea is to feed two streams of instructions through the same pipeline, each using their own discrete registers to take advantage of execution units (adders, floating point units, etc) that might otherwise go idle.
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November 15, 2009 10:54:35 PM

so why cant you have all on one core meaning the pipelines,registers etc whats the advantage of two cores?
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November 15, 2009 11:04:14 PM

Because it's alot cheaper to design and manufacture two or more smaller and less complex pipelines and run two or more threads in parallel than a highly complex pipeline that will need to get larger and more complex over time to support a greater number of instructions per clock.

Think of a runner in a competition where they have to pick up sandbags from one end of a football field and drop them off at the other. Ideally, you want them to be able to carry more sand bags to the other side in a given time period with each new attempt. You can train them every day, you can pump them full of steroids all you want, but it gets harder and harder to help them continue to stay ahead of their previous personal bests. Instead, you could get two runners to share the load, without pumping them full of steroids. When the demand gets too high, you add more runners.

For comparison, a GPU in the context of the runners would be hundreds of runners, but each would be carrying a small number of sandbags at a time, whereas the "CPU runners" can carry many sandbags but only have a limited number of runners.
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November 16, 2009 1:04:46 AM

The terminology is a little loose here, but if you were to put multiple pipelines into one "core", I'd say that what you'd be talking about is a vector processing unit. That's an architecture in which one instruction triggers multiple add operations on multiple data items. Those types of architectures are rather special-purpose and wouldn't be compatible with the programs used on x86 systems.

The SSE unit in x86 systems is a limited form of vector processor embedded within the x86 instruction pipeline.

You have a lot of questions about pipelines. You may want to read this PDF file about the microarchitecture of the Pentium 4. The Pentium 4 is out of date, but the reality is that pipeline concepts haven't changed a whole lot since it came out, and this article provides a pretty good description of all the things that are done in the pipeline of a modern CPU.
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