F@H and Accusations made by the FTC Against Intel

ElMoIsEviL

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So some buddies and I were all talking about the GPU3 client coming out soon from Stanford (Q1 2010) which will be using OpenMM (OpenCL). You can read a bit about it here and here.

So we were looking at the F@H FAQs and what not and we stumbled upon this page:

http://folding.stanford.edu/English/FAQ-PROTOMOL

What is of particular note is this quote:

What special instructions, such as SSE2, does the ProtoMol core support?

The ProtoMol core does not have any hand coded assembly with SSE instructions. However, we are using the Intel compiler with options which cause it to create several optimized code paths using these instructions. The code then chooses the best path at run-time based on the CPU it detects.

Unfortunately, at the time of this writing, the Intel compiler does not treat non-Intel chips fairly. For example, it will always dispatch AMD chips which do support SSE2 to the slowest code path. To work around this issue we have created a 64-bit version of the core which always uses at least the SSE2 instructions since all or nearly all 64-bit CPUs support these.

Many people have asked about the specific instructions used. It is not easy to tell which instructions the compiler chooses and the final result depends on which instructions your CPU supports. However, the compiler can generate optimized code paths for SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2.

Thoughts?
 

Gdmcdona

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Dec 29, 2009
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If Intel intended for the compiler to treat non-Intel chips that way, I would have to say that such an action should be viewed as an unethical business practice.

Although i must also say that since the company is using the compiler for something it was likely not intended for... it may just be an error in the coding...
 

AMW1011

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I'm reserving judgment on this one, it seems that there is too little information.

If it is true then I hope AMD gets money out of it somehow, if not then I guess fixing this code will have to suffice.