CPU-memory latency DDR3

Isn't memory speed determined by UnCore and memory multiplier on Nehalem?

If your Bclk is at stock 133 then change UnCore to 20 and Mem multi to 10 and you get your 1333MHz RAM.

As far as latencies go, it's all going to be down to the RAM itself, so it's difficult to say "yes, those timings will work".

Doesn't your motherboard have an auto correction on it, or at least a clear CMOS button? If your timings don't work then it should just sort itself out on the next POST to where you were before.

What's your RAM? See if you can find some reviews for it and see what testers have got it running at. To be honest though, outside of a synthetic speed and timings aren't making much of a difference. At 1333MHz you could get away with 7-7-7-20 1T, but it's dependant on the chips as always.

Personally I'd keep the RAM at 1.65V and see how tight you can go, then see how low the voltage can go when you're tight.

http://icrontic.com/apps/nehalem-calc/

EDIT: ignore the link - that version is old and a little off. I have a downloadable version at work I can make available to you if you want.

This is my RAM:
http://www.amazon.com/OCZ-OCZ3G1333LV6GK-PC3-10666-Trip...



Product Features

* PC3-10666 DDR3 GOLD 1333MHZ TRIPLE CHANNEL 6GB (3 x 2GB) KIT 9-9-9-20, Z3 XTC HEATSPREADER 240 PIN DIMM

Technical Details

* Memory Category: Desktop
* Memory Type: DDR3
* Memory Speed: PC10666
* Memory Speed MHz: 1333MHz
* Memory Size: 3 x 2048MB
* Total Memory Size: 6GB
* Memory Modules: 3
* Memory Channels: Triple
* Memory Socket: DIMM
* Memory CAS Latency: 9-9-9-20



The main thing is the latency is at a very strange timing of 9-9-9-20... ? O_o

9-9-9-20 is a weird one I must admit.

Had a look around and some people have got them to 9-9-9-24 at 1800MHz. I doubt you'd have any trouble getting them to 8-8-8-20 at 1333MHz, or even a bit tighter.

Is the last number determined by anything? Or can I put a random number between 16 and 20 in? i.e 17, 18, 19?

Well I'm playing catch-up myself on how memory timings work and what they should be.

According to Wikipedia: http://en.wikipedia.org/wiki/Memory_timings

the 4th one is TRAS - Row Active Time
"The number of clock cycles required between a bank active command and issuing the precharge command. This is the time needed to internally refresh the row, and overlaps with TRCD. Typically approximately equal to the sum of the previous three numbers."

So I presume you match it to the sum of whatever you set the other 3 values to, make sure it's stable and then maybe drop it a little.