Bulldozer core confuzldness

[blackjackedy]

i was reading about the new bulldozer archetecture and im not quite sure about something. AMD said that they are going to combat their weakness in threaded apps by having their cores put into pairs. does that mean that two integer clusters (one bulldozer core) could work on a single thread, and say eight cores working in a quad-threaded app?

 

[bobdozer]

No.

There may be some trickery that AMD hasn't told us about yet, but so far nobody can break a thread into two. It's more likely that Bulldozer will have insanely high clocks for single threads.

 

[fazers_on_stun]

Heh, IIRC the 'multiple cores working on a thread' is the old "reverse hyperthreading" scenario, sorta like macro-op fusing but spread across cores instead of just registers. I think the hardware requirements would be extreme.

I believe BD will be the first AMD 4-issue core, comparable to Intel's, since K8 through the current Phenoms are 3-issue cores which is one of the reasons why K8 and later has lower IPC. However, I'm not sure if the 4 decoders are per-core or per-module on BD. IIRC a BD module is 2 integer pipes with a shared FP unit. Since these are complete integer pipes, AMD calls them cores I think. In contrast, Intel's core is an integer pipe plus an FP unit plus extra hardware to let the core switch to another thread when it's not fully occupied with the current thread (hyperthreading). Intel's philosophy is that for lightly-loaded threads (i.e., <70% clock cycles used), it makes sense to switch to another thread and execute it for a while, to keep the core working as near 100% capacity as possible. AMD's BD is taking this one step further and making the second integer pipe much more complete.

 

[JAYDEEJOHN]

1 thread, 1 core, unless they have a technician called BM working for them :0

 

[fazers_on_stun]

1 thread, 1 core, unless they have a technician called BM working for them :0

Ol' Baron Matrix?? . He hangs out over at AMDZone nowadays. And I haven't seen a reverse-hyperthreading post from him in a couple years now .

 

[jimmysmitty]

Heh, IIRC the 'multiple cores working on a thread' is the old "reverse hyperthreading" scenario, sorta like macro-op fusing but spread across cores instead of just registers. I think the hardware requirements would be extreme.

I believe BD will be the first AMD 4-issue core, comparable to Intel's, since K8 through the current Phenoms are 3-issue cores which is one of the reasons why K8 and later has lower IPC. However, I'm not sure if the 4 decoders are per-core or per-module on BD. IIRC a BD module is 2 integer pipes with a shared FP unit. Since these are complete integer pipes, AMD calls them cores I think. In contrast, Intel's core is an integer pipe plus an FP unit plus extra hardware to let the core switch to another thread when it's not fully occupied with the current thread (hyperthreading). Intel's philosophy is that for lightly-loaded threads (i.e., <70% clock cycles used), it makes sense to switch to another thread and execute it for a while, to keep the core working as near 100% capacity as possible. AMD's BD is taking this one step further and making the second integer pipe much more complete.

BARCELONA WILL HAVE REVERSE HT THAT WILL SPLIT ONE THREAD OVER TWO CORES MAKING IT TEH UBER LEETZ FASTER!!!!!

Nope. No reverse HT.

BD will have it!!!!!!!!!!!1

Probably not since its near impossible....

 

[JAYDEEJOHN]

If this were the case, wed be seeing LRB already, there wouldnt need be the new push for multi threading in our schools and businesses, apps, workloads etc etc.
GPUs would be ruling the PC market etc etc

 

[werxen]

The way I understand it is that Bulldozer is similar to the processor in the PS3 but modified in a weird way where 2 cores will perform threads but aren't actual 'cores' - they work together but output information as a single core. Maybe I'm wrong.

 

[JAYDEEJOHN]

As was sais earlier, the 2 "cores" share other chores with the rest of the module.
Think of it this way, each module is a true core, tho, similar to intels hyperthreading, but dedicating more hardware to it, thus making it a better multi threading operator, tho, on singular threading, its unknown as to how much better it will be over prior gens.
It all depends on workloads

 

[bobdozer]

Each module is 2 real cores, or a dual core. It's nothing like hyperthreading, this is 2 actual real cores.

 

[cjl]

Each module is 2 real cores, or a dual core. It's nothing like hyperthreading, this is 2 actual real cores.

No it isn't. A real core has both an ALU and an FPU, and in the BD modules, the ALU is duplicated, but they share an FPU. It's more like a core and a half than two cores.

 

[JAYDEEJOHN]

Exactly.
Its always been understood both Int and FP make up a whole core, as they workloads require both to some extent, depending on workload.
fazers answered it most elloquintly in description, the only major unknown to me at this point is the advent of the gpu on die, and how itll affect the FP calls

 

[yannifb]

Wait a minute, BD has dual 128 bit FPUs per core, not one shared fpu. However they can be used together to act as a single 256 bit FPU.

 

[cjl]

Really? I must be misremembering it then...

Let me look up some references about the bulldozer architecture.

 

[bobdozer]

Bulldozer is a dual core architecture. It's different but at it's base level it is 2 cores instead of 1.

There is no "single core" with Bulldozer, the lowest part of it is a "module" which has 2 integer cores. There is no hyperthreading involved either, but there could be in future when it is possible for AMD to hyperthread both cores same time.

 

[cjl]

Looking at the core architecture, it does have a single FPU consisting of a single FP scheduler, and dual 128 bit FMAC pipes.

http://www.anandtech.com/Gallery/Album/754#9

 

[JAYDEEJOHN]

Wait a minute, BD has dual 128 bit FPUs per core, not one shared fpu. However they can be used together to act as a single 256 bit FPU.

Youre right, tho again, this will effect perf in many workloads

 

[JAYDEEJOHN]

Hyperthreading FPU units? heheh

 

[cjl]

Bulldozer is a dual core architecture. It's different but at it's base level it is 2 cores instead of 1.

There is no "single core" with Bulldozer, the lowest part of it is a "module" which has 2 integer cores. There is no hyperthreading involved either, but there could be in future when it is possible for AMD to hyperthread both cores same time.

Just having 2 ALUs doesn't mean that it has 2 cores. It has roughly a core and a half, as I described above. They wouldn't hyperthread it, as there are already shared resources between the two partial cores in each module. Attempting to hyperthread it would only cause the threads to compete for resources, causing all of them to slow down. Hyperthreading works when you have unutilized execution units, which is a problem the Bulldozer architecture is meant to fix. Hyperthreading is a completely different solution to the same problem, which involves less performance gain, but also less additional silicon.

(Actually, one way to look at it is that Bulldozer has two separate cores for integer use in each module, but it in effect "hyperthreads" floating point operations within each module, sending both threads to one FP scheduler)

 

[yannifb]

Looking at the core architecture, it does have a single FPU consisting of a single FP scheduler, and dual 128 bit FMAC pipes.

http://www.anandtech.com/Gallery/Album/754#9

Oh oops. Well at least its a pretty beefy fpu being shared.

On another note, how much of an IPC increase over Phenom II and/or Nehalem do you think BD will bring? After all it could possibly be significant, considering it isnt just a modified k8 like Phenom II was.

 

[JAYDEEJOHN]

Some say 17%, others higher

 

[cjl]

Oh oops. Well at least its a pretty beefy fpu being shared.

On another note, how much of an IPC increase over Phenom II and/or Nehalem do you think BD will bring? After all it could possibly be significant, considering it isnt just a modified k8 like Phenom II was.

I hope it's huge, honestly. I'd love to see it actually competitive with Sandy Bridge. More realistically, I'd think that it will be roughly competitive with Nehalem for single threaded on a clock for clock basis, and somewhat better (perhaps even competitive with Sandy Bridge) for multi threaded. That might be optimistic, but I really do hope AMD can get a truly competitive chip out.

 

[JAYDEEJOHN]

Thats what I see coming too, not a killer, but depending on price and what you do, possibly a thriller

 

[bobdozer]

Just having 2 ALUs doesn't mean that it has 2 cores. It has roughly a core and a half, as I described above.

It's 2 cores. Both cores have their own ALU's and AGU's. There is nothing in Bulldozer that makes it a core and a half, a hyperthreaded core or anything else. You cannot make this anything except 2 cores.

http://www.anandtech.com/Gallery/Album/754#5

The green parts in the 8th slide are cores, integer cores = cores.

http://www.anandtech.com/Gallery/Album/754#8

 

[JAYDEEJOHN]

The basic building block is the Bulldozer module. AMD calls this a dual-core module because it has two independent integer cores and a single shared floating point core that can service instructions from two independent threads. The two thread machine is larger than a single core but smaller than two cores with straight duplication of resources.
http://www.anandtech.com/show/3863/amd-discloses-bobcat-bulldozer-architectures-at-hot-chips-2010/4