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Intel Sandy Bridge-EP versus AMD Interlagos

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October 1, 2010 5:27:37 PM

Hello group,

In the 3rd quarter of 2011, Intel will be launching it's next generation CPU with Sandy Bridge-EP, which is expected to feature 8 cores, 16MB of L3 cache (although some rumours put this at 20MB), 4 DDR3 memory controllers, 2 QuickPath 1.1 links and 32 lanes of PCI-Express 3.0.

Sandybridge Architecture Overview:
http://www.realworldtech.com/page.cfm?ArticleID=RWT0918...

In approximately the same timeframe AMD will be launching Interlagos Opteron, which is based on AMD's new Bulldozer core architecture, Interlagos has 8 Bulldozer modules, thus 16 cores per CPU!

Bulldozer Architecture Overview:
http://www.realworldtech.com/page.cfm?ArticleID=RWT0826...

It looks like by the 3rd Quarter of 2011, Interlagos Opteron will finally be better than Intel CPUs for computer chess play!

Perhaps, someone more technical can comment.

Cordially,

CG
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October 1, 2010 6:02:40 PM

Come back in a year when we have benches to show what's what - who knows what's gonna happen.
a c 126 à CPUs
a b À AMD
October 1, 2010 8:43:02 PM

Well Intels 8 core Sandy Bridge EP also has SMT so 16 threads.

I am waiting to see what BD will be able to do. Its a interesting idea but all ideas have to be shown in action. Sometimes they turn out great and other times they turn out pretty crappy (Netburst, K10).
Related resources
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October 1, 2010 9:29:38 PM

^ Agreed. I too say wait for it and see. No point in spreading around speculation.
October 1, 2010 10:01:05 PM

Why are so many people so against speculating? Its interesting, and we all know its just speculation too.
October 1, 2010 10:51:15 PM

Solid facts are good, but Ive found they too change as a finer grain is revealed.
If we ignore this, then were doomed to mediocrity
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a b À AMD
October 1, 2010 11:08:52 PM

yannifb said:
Why are so many people so against speculating? Its interesting, and we all know its just speculation too.


Its easier to speculate on something thats more solid and known. I.E. Sandy Bridge. We know its based around Core so we know that it should also provide performance enhancements. We knew that Deneb was Phenom with major improvements so we also knew it should provide better performance as well if we also considered the move to 45nm.

But with Bulldozer, its new. The idea behind it sounds good but we have never seen anything like this in action so its just hard to speculate with. We can say a 8 module CPU will be equal to or better than a true 16 core or we can say it wont be.

I personally prefer actual facts to speculation. All the speculation behind Prescott pointed towards better than Northwood. But that was wrong and is why I never went with a Prescott based Pentium 4. K10 was speculated to be better than Core 2.

But facts will present themselves in time. Plus with facts you can't hype. With speculation hype can grow out of control.
a b à CPUs
October 1, 2010 11:15:00 PM

K10 was speculated to be better than Core 2

by who ? I must have missed it LOL
October 1, 2010 11:15:44 PM

There truly isnt enough info on BD currently, and I believe this is hurting AMD
They did show some smaller renditions to potential clients, and they were thuroughly impressed.

Comparing something to a known constant always will have an advantage here.
Even if its awhile before BD comes to market, I think AMD needs to put out a lil more solid infos
October 1, 2010 11:16:45 PM

spentshells said:
K10 was speculated to be better than Core 2

by who ? I must have missed it LOL

MMM, BM amongst others
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October 1, 2010 11:27:47 PM

JAYDEEJOHN said:
There truly isnt enough info on BD currently

Exactly. This is why I say this is pure speculation. At least with Sandy Bridge, we have Anadtech's preview that is pretty solid.
October 1, 2010 11:42:39 PM

The longer it takes, knowing its close, the worst itll look for AMD
Understand, Im saying this now, way early on, but as we creep closer to the expected delivery, Im hoping for AMDs sake, BDs abilities sake, we have much more info, especially with this unique approach
a c 126 à CPUs
a b À AMD
October 1, 2010 11:50:36 PM

spentshells said:
K10 was speculated to be better than Core 2

by who ? I must have missed it LOL


AMDs VP was the one who touted the claim of 40% better than Clovertown (the first set of Core 2 based Xeons) in a majority of workloads:

http://www.zdnet.com/blog/hardware/amd-claims-quad-core...

It was a claim for server chips, which was wrong too in most server areas except for 4P+, that was perpetuated by a lot of AMD fanboys that K10, Phenom, would be 40% faster than Core 2 Quad.

That was major hype that pretty much killed Phenom when it hit performing worse than a equally clocked year old Core 2 Quad.
October 1, 2010 11:55:35 PM

But it was carried all over as well, not just AMD fans.
Total distortion, and again, is why, with its new arch, new approach, AMD really needs to get this info out ASAP, over and over, so no misconceptions, no fanboy explosions done thru misconceptions etc
October 1, 2010 11:57:49 PM

Think about the confusions Intel has caused with its simple variety
Does i3 have SMP, will i5 have more or higher turbo, or none at all etc

AMD/BD enters into some of this, plus its new concept/approach
a b à CPUs
October 2, 2010 12:36:30 AM

I think that I will speculate. I speculate that the AMD processor will be faster than the Intel processor per core on multi-threaded programs but will be slower on single threaded programs at the same clock speed..
a b à CPUs
October 2, 2010 1:28:35 AM

for now i'll wail till we have some hard data. On paper, the way BD is made sounds interesting and it should be fast but we seen where that went before.

Cant wait for some hard data.
a b à CPUs
October 2, 2010 12:59:44 PM

LOL - wonder why the OP wants an expensive server CPU just to play computer chess? Unless he's planning on something to compete along the lines of IBM's Blue Gene??
a b à CPUs
October 2, 2010 3:08:33 PM

^ I guess he's a pro Chess player. DeepFritz for example, can benefit from multi cores a LOT.

I've seen some pro chess players who have 4P or even a small cluster that they use to run chess programs.
October 2, 2010 3:13:51 PM

Shadow703793 said:
^ I guess he's a pro Chess player. DeepFritz for example, can benefit from multi cores a LOT.

I've seen some pro chess players who have 4P or even a small cluster that they use to run chess programs.


Was it this guy?
a c 99 à CPUs
October 2, 2010 11:50:53 PM

LePhuronn said:
Come back in a year when we have benches to show what's what - who knows what's gonna happen.


Here's what we know so far:

- Sandy Bridge needs a new socket (Socket R/LGA2011) while Interlagos is supposed to be a drop-in upgrade in G34 motherboards.
- Sandy Bridge will have 8 cores/16 threads in the 1P/2P segment and some unknown but probably higher core count in the 4P+ segment (Westmere-EX has 10 cores/20 threads.) Interlagos will be available in 12 core/12 thread and 16 core/16 thread variants.
- Both will support four channels of DDR3 running at least at DDR3-1600 speeds.
- Socket R/LGA 2011 is supposed to be able to use the same heatsinks as LGA1366.
- Interlagos's thermal envelopes will be fairly similar to Magny-Cours's.
- We know a little bit about the performance of some very early Sandy Bridge samples in a handful of benchmarks. We really know nothing about Interlagos's performance.
- We know Sandy Bridge will have 32 KB L1 I$ and D$ plus 256 KB of L2 per core, with the cores and some L3 tied together on a Nehalem-EX style ring bus. Interlagos will be an MCM like Magny-Cours, connected through HT links, but AMD is quiet on cache sizes.
- Both Sandy Bridge and Interlagos will have some sort of turbo mode.
- Both will be made on 32 nm HKMG processes.
- Neither is supposed to have an on-die GPU, unlike some of the planned desktop and mobile variants using the same architecture.

If I have missed anything, please add to the list.
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October 3, 2010 12:00:21 AM

MU_Engineer said:
Here's what we know so far:

- Sandy Bridge needs a new socket (Socket R/LGA2011) while Interlagos is supposed to be a drop-in upgrade in G34 motherboards.
- Sandy Bridge will have 8 cores/16 threads in the 1P/2P segment and some unknown but probably higher core count in the 4P+ segment (Westmere-EX has 10 cores/20 threads.) Interlagos will be available in 12 core/12 thread and 16 core/16 thread variants.
- Both will support four channels of DDR3 running at least at DDR3-1600 speeds.
- Socket R/LGA 2011 is supposed to be able to use the same heatsinks as LGA1366.
- Interlagos's thermal envelopes will be fairly similar to Magny-Cours's.
- We know a little bit about the performance of some very early Sandy Bridge samples in a handful of benchmarks. We really know nothing about Interlagos's performance.
- We know Sandy Bridge will have 32 KB L1 I$ and D$ plus 256 KB of L2 per core, with the cores and some L3 tied together on a Nehalem-EX style ring bus. Interlagos will be an MCM like Magny-Cours, connected through HT links, but AMD is quiet on cache sizes.
- Both Sandy Bridge and Interlagos will have some sort of turbo mode.
- Both will be made on 32 nm HKMG processes.
- Neither is supposed to have an on-die GPU, unlike some of the planned desktop and mobile variants using the same architecture.

If I have missed anything, please add to the list.



Excellent post. Thank you.
a c 126 à CPUs
a b À AMD
October 3, 2010 3:19:31 AM

MU_Engineer said:
Here's what we know so far:

- Sandy Bridge needs a new socket (Socket R/LGA2011) while Interlagos is supposed to be a drop-in upgrade in G34 motherboards.
- Sandy Bridge will have 8 cores/16 threads in the 1P/2P segment and some unknown but probably higher core count in the 4P+ segment (Westmere-EX has 10 cores/20 threads.) Interlagos will be available in 12 core/12 thread and 16 core/16 thread variants.
- Both will support four channels of DDR3 running at least at DDR3-1600 speeds.
- Socket R/LGA 2011 is supposed to be able to use the same heatsinks as LGA1366.
- Interlagos's thermal envelopes will be fairly similar to Magny-Cours's.
- We know a little bit about the performance of some very early Sandy Bridge samples in a handful of benchmarks. We really know nothing about Interlagos's performance.
- We know Sandy Bridge will have 32 KB L1 I$ and D$ plus 256 KB of L2 per core, with the cores and some L3 tied together on a Nehalem-EX style ring bus. Interlagos will be an MCM like Magny-Cours, connected through HT links, but AMD is quiet on cache sizes.
- Both Sandy Bridge and Interlagos will have some sort of turbo mode.
- Both will be made on 32 nm HKMG processes.
- Neither is supposed to have an on-die GPU, unlike some of the planned desktop and mobile variants using the same architecture.

If I have missed anything, please add to the list.


You are pretty much dead on but I think there are a few things I can add:

-High end desktop Sandy Bridge B2 (LGA2011) will have 15 - 20MB L3 cache, 15MB L3 for 6 (12 threads) core and 20MB L3 for 8 (16 threads) core.
-Sandy Bridge EN (LGA2011) 1-2P server will have 20MB L3 and will come in 2-8 (4-16 threads) core variants
-Sandy bridge EP (LGA2011) 1-2P server will also have 20MB L3 and will have 4-8 (8-16 threads) cores
-Sandy Bridge EX (LGA2011) entry level 4P server will have 20MB L3 cache and be strictly 8 (16 threads) cores and will utilize 2xQPI 1.1 links
-All versions of Sandy Bridge will incorporate a 256bit ring bus to connect the cores
-All versions are rated at 35w-95w TDP except for Sandy Bridge EP and EX which rance from <80w-150w TDP, probably depending on the clock speed and amount of memory channels used
-Micro-op trace cache and enlarged, optimized branch predictor
-Peak memory bandwidth using 4x DDR3-1600 is 51.2GB/s, more than double what mainstream DT is at 21.3GB/s using 2x DDR-1333 and almost 2x more than Nehalem

Other than that I can't see much more. Westmere EX I think is just a side step until they can move to Ivy Bridge.

I would expect that a lot of server applications hungry for memory bandwidth will love anything on LGA2011. Thats a huge increase. Wish we had a idea of Interlagos memory bandwidth to see because the server market is where they make the most money.
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October 3, 2010 12:10:52 PM

jimmysmitty said:

I would expect that a lot of server applications hungry for memory bandwidth will love anything on LGA2011. Thats a huge increase. Wish we had a idea of Interlagos memory bandwidth to see because the server market is where they make the most money.


Interlagos will support four channels of DDR3 running at a speed of DDR3-1600 or better, so the theoretical memory bandwidth will be at least that of Sandy Bridge. I have heard unconfirmed rumors of Bulldozer supporting DDR3-1866, since that is the highest JEDEC-approved DDR3 server memory speed. I would tend to believe it since some G34 boards like the ASUS KGPE-D16 have DDR3-1866 as an option for supported memory speeds. AMD is also well noted to hang onto a certain spec of memory and push up the clock speeds as much as they can before moving onto the next generation of memory.
October 3, 2010 12:35:17 PM

All we have committed to is a.) higher speed DRAM support and b.) a new memory controller that will have greater throughput.

Between those two there should be some very nice increases in performance.
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October 3, 2010 7:01:51 PM

Damn 20MB cache? You guys realize that this could fit a small program just on the cache itself? And this is probably 8x the amount of RAM that was available in the days of DOS.

Quick question @MU and JS:
Quote:

-Peak memory bandwidth using 4x DDR3-1600 is 51.2GB/s, more than double what mainstream DT is at 21.3GB/s using 2x DDR-1333 and almost 2x more than Nehalem

I'm assuming this is Quad Channel?
October 3, 2010 7:14:48 PM

MU_Engineer said:
Interlagos will support four channels of DDR3 running at a speed of DDR3-1600 or better, so the theoretical memory bandwidth will be at least that of Sandy Bridge. I have heard unconfirmed rumors of Bulldozer supporting DDR3-1866, since that is the highest JEDEC-approved DDR3 server memory speed. I would tend to believe it since some G34 boards like the ASUS KGPE-D16 have DDR3-1866 as an option for supported memory speeds. AMD is also well noted to hang onto a certain spec of memory and push up the clock speeds as much as they can before moving onto the next generation of memory.


Question: why is server memory significantly slower than microcomputer memory? Is it because of these JEDEC needed approvals? And how does it work?

In addition, this is the best server motherboard that my research could find:

http://www.evga.com/products/moreinfo.asp?pn=270-WS-W55...

thanks

CG
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October 3, 2010 10:07:17 PM

^ The SR2 is by no means a true server motherboard, it's basically a 2P board geared for OCing rather than stability,etc. The SR2 is aimed at high end OCing, mainly with WCing or LN2/Dice runs.

As far as why ECC RAM is slower, from my understanding is it is partly due to the JEDEC and partly due to the nature of the ECC.
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October 3, 2010 11:12:05 PM

MU_Engineer said:
Interlagos will support four channels of DDR3 running at a speed of DDR3-1600 or better, so the theoretical memory bandwidth will be at least that of Sandy Bridge. I have heard unconfirmed rumors of Bulldozer supporting DDR3-1866, since that is the highest JEDEC-approved DDR3 server memory speed. I would tend to believe it since some G34 boards like the ASUS KGPE-D16 have DDR3-1866 as an option for supported memory speeds. AMD is also well noted to hang onto a certain spec of memory and push up the clock speeds as much as they can before moving onto the next generation of memory.


I would think it would depend on the HTT links though. When Intel put QPI out, it was faster than the e\3rd gen HTT link. Hopefully AMD does push up the HTT links though. Make it a bit spicy of a competition.

As for AMD hanging on, I think they wait to move to the next one till the pricing has gone down since Intel starts adoption right away. Its the safer bet I would say.

Shadow703793 said:
Damn 20MB cache? You guys realize that this could fit a small program just on the cache itself? And this is probably 8x the amount of RAM that was available in the days of DOS.

Quick question @MU and JS:
Quote:

-Peak memory bandwidth using 4x DDR3-1600 is 51.2GB/s, more than double what mainstream DT is at 21.3GB/s using 2x DDR-1333 and almost 2x more than Nehalem

I'm assuming this is Quad Channel?


Yep. All LGA2011 mobos and CPUs will be quad channel DDR3, and all AMD server based CPUs should be too. 640K was all DOS needed so yea... more than 8x.

Shadow703793 said:
^ The SR2 is by no means a true server motherboard, it's basically a 2P board geared for OCing rather than stability,etc. The SR2 is aimed at high end OCing, mainly with WCing or LN2/Dice runs.

As far as why ECC RAM is slower, from my understanding is it is partly due to the JEDEC and partly due to the nature of the ECC.


ECC basically makes sure that every bit is correct. Its needed in the server world since the data is extremley important.
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October 4, 2010 1:04:53 AM

Quote:


ECC basically makes sure that every bit is correct. Its needed in the server world since the data is extremley important.

I get that, but what Chess Gator wanted to know was WHY is it that ECC RAM is slower (DDR3 2000 for gaming vs DDR3 1333 usually for ECC).
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October 4, 2010 1:58:10 AM

Shadow703793 said:
Quote:


ECC basically makes sure that every bit is correct. Its needed in the server world since the data is extremley important.

I get that, but what Chess Gator wanted to know was WHY is it that ECC RAM is slower (DDR3 2000 for gaming vs DDR3 1333 usually for ECC).


Basics of ECC are the fact that it corrects errors found. Due to magnetic interferance from other parts, a single bit in DRAM can be flipped to the opposite (0,1). Since it is going to check every bit in a 64bit or 32bit 'word' it causes it to take more time, in essence be slower. Normal desktop DRAM is normally not ECC so it doesn't check every bit and can therefore perform faster.
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October 4, 2010 2:31:19 AM

^ Thank you. Basically what I thought. But seriously, what's stopping the ECC RAM from getting faster? I get how it takes time to check, but could the manufacturers not increase the speed of the chip that detects/corrects errors?

From my understanding, each RAM DIMM had a dedicated IC that checks for errors, so in theory, increasing the speed of this IC should allow for faster RAM correct?
October 4, 2010 3:17:19 AM

As you increase speed of the memory you may also increase the change for memory errors. That is why there are customers that I talk to that prefer either slower memory or underclocking memory. If you are in an environment where you are experiencing high numbers of correctable errors, you take that action.

Overclocking cpus will do the same thing. When you get them real fast, sometimes 2+2=5. Not a big deal in a game. REALLY big problem in an application on a server.
October 4, 2010 3:34:47 AM

jf-amd said:
As you increase speed of the memory you may also increase the change for memory errors. That is why there are customers that I talk to that prefer either slower memory or underclocking memory. If you are in an environment where you are experiencing high numbers of correctable errors, you take that action.

Overclocking cpus will do the same thing. When you get them real fast, sometimes 2+2=5. Not a big deal in a game. REALLY big problem in an application on a server.


So ECC memory is mostly useful for scientific, financial, or military servers?
October 4, 2010 12:52:57 PM

yannifb said:
So ECC memory is mostly useful for scientific, financial, or military servers?


ECC is mostly useful for any server.

Let's say you have a file sharing server that 15 people are relying on for all of the documents that they are working on. There is a memory error that causes the server to reboot. 15 people lose the document changes that they were working on. Let's call that 20 minutes worth of work each that needs to be recreated. And there is the 5 minutes that they waste waiting for the server to reboot and re initialize so that they can access their documents.

25 x 15 = 375 minutes of lost productivity.

That is not even counting the time of the technician to figure out what just happened. Someone has to go look at the logs and figure out why the server rebooted and everyone lost their work. Tack on another 30 minutes of a wasted technician's time.

If the average employee is making $75K a year, that is $.625 per minute. Or, that little memory error just cost your company $234.75. Now think of that as either some executives or highly paid engineers or larger numbers of users and you see how a single memory error could be in the thousands.

If you experience one memory error per month that could be a significant amount of money. For the typical server, the cost of ECC memory is easily covered by saving the company from just one reboot.

I would never put a server in a company that didn't have ECC memory, regardless of the usage.
October 4, 2010 7:30:00 PM

Shadow703793 said:
Exactly. This is why I say this is pure speculation. At least with Sandy Bridge, we have Anadtech's preview that is pretty solid.


I read somewhere that AMD are going to give us more details this autumn
October 4, 2010 8:19:49 PM

jf-amd said:
I would never put a server in a company that didn't have ECC memory, regardless of the usage.
Totally agree. You don't want to be the guy explaining to the CEO why your company can't do its billing, or pay its payroll, because you cheaped out on memory and all your data got garbled.
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October 4, 2010 8:52:13 PM

Quote:
If you experience one memory error per month that could be a significant amount of money. For the typical server, the cost of ECC memory is easily covered by saving the company from just one reboot.

I would never put a server in a company that didn't have ECC memory, regardless of the usage.

Agreed on absolutely running ECC on a workstation or server.

@jf: Does AMD have a response to new RAS features from Intel (in the form of the Xeon 7500,etc). From my understanding, these Xeons are targeting the market dominated by IBM Power CPUs where reliability is at the top of the list. Will or does AMD have similar features and target this market?

Any plans by AMD to work with a company like SeaMicro to build something like this: http://www.anandtech.com/show/3768/seamicro-announces-s...
October 4, 2010 11:15:36 PM

Xeon 7500 series has some RAS features that does make them compete with Power, and, more importantly, Itanium.

My theory is intel is probably spending billions on keeping itanium alive, and it does not drive that much revenue for them. (Whenever they talk about itanium revenue, they do so a the system level, not the processor level).

Long term it might make more sense for them to transition itanium apps to x86 then continue to keep that platform. Some of those RAS features are good, but the real question is who would pay 2.5X the cost of the processors just to get them.

The 4P market (today) is ~4-5%. The number of people that will pay the premium is probably a pretty small sliver of an already small market.

We think there is a bigger market opportunity that exists is bringing 4P technology and performance to the 2P market.

Every generation of processors has new RAS figures, so you will see new ones with bulldozer.
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October 4, 2010 11:42:00 PM

Shadow703793 said:
Quote:
If you experience one memory error per month that could be a significant amount of money. For the typical server, the cost of ECC memory is easily covered by saving the company from just one reboot.

I would never put a server in a company that didn't have ECC memory, regardless of the usage.

Agreed on absolutely running ECC on a workstation or server.

@jf: Does AMD have a response to new RAS features from Intel (in the form of the Xeon 7500,etc). From my understanding, these Xeons are targeting the market dominated by IBM Power CPUs where reliability is at the top of the list. Will or does AMD have similar features and target this market?

Any plans by AMD to work with a company like SeaMicro to build something like this: http://www.anandtech.com/show/3768/seamicro-announces-s...


Pretty much the servers that a company will use will have ECC RAM. My work server doesn't because we use it to store images (ISOs) and programs that we need, nothing super important like finances.

That Atom system is pretty cool. I don't see it lasting very long though since Intel pushed out its 48 core Terascale based CPU for testing a few months back. If it uses the same tech as Terascale then a 48 core choulc be able to do the same job as 65 server systems since Terascale was doing about 130 servers worth of work but only used 62w of power.

As for Itanium, it was a good idea but bad execution. Its a true 64bit system that doesn't rely on any of the x86 based march. But as said it was executed badly. It emulated x86 instead and thus it gave a pretty large performance drop. Thats why x86-64 is what we use.

If anything for Intel at least, terascale seems to be their future along with photonics. As for AMD, they haven't really said anything beyond a few years. I wouldn't doubt it if they were working on something much like Terascale.
a b à CPUs
October 4, 2010 11:58:21 PM

@jf:

Can you tell what RAS features the Server variant of Bulldozer will have?
Quote:

The 4P market (today) is ~4-5%. The number of people that will pay the premium is probably a pretty small sliver of an already small market.

True, but in the 4P+ market (basically, HPC), the people are willing to pay a notable premium I believe. Here the Xeon 7500 make sense.Btw, is AMD even doing anything in the HPC area? If you look at the current Top500 Intel controls about 80% of that list. Any reason why AMD is not putting much effort in to getting more market share here?

But yeah, Itanium was/is a failure imo. Intel should kill it off and be done with it. It was a good idea, but the execution of the marketing, consumer response,etc $ucked.
October 5, 2010 11:30:58 AM

Shadow703793 said:
@jf:

Can you tell what RAS features the Server variant of Bulldozer will have?
Quote:

The 4P market (today) is ~4-5%. The number of people that will pay the premium is probably a pretty small sliver of an already small market.

True, but in the 4P+ market (basically, HPC), the people are willing to pay a notable premium I believe. Here the Xeon 7500 make sense.Btw, is AMD even doing anything in the HPC area? If you look at the current Top500 Intel controls about 80% of that list. Any reason why AMD is not putting much effort in to getting more market share here?

But yeah, Itanium was/is a failure imo. Intel should kill it off and be done with it. It was a good idea, but the execution of the marketing, consumer response,etc $ucked.


1. No, I cannot comment on the features.

2. If you think that the 4P+ market is HPC, then you are really far off. If you go look at the HPC market you will find few, if any 4P's because the price/performance is so much better with 2P. We recently changed our pricing and now 4P and 2P parts are the same price. This is causing a lot of people in the HPC world to consider 4P (greater density, less cabling, fewer physical systems to manage).

I would be willing to bet, with the price of the 7500 series, that there will be few, if any 4P HPC platforms based on that architecture.

Are we doing anything in the HPC area? Well, the #1 and #4 supercomputers in the world are both based on Opteron and 7 of the top 21 are all Opteron. There is only one 7500-based platform in the top 20 and I would be willing to bet that they cut an amazingly good deal on those processors to get the win.
a b à CPUs
October 5, 2010 4:25:47 PM

^ Good point. Yeah you are right, most of the HPCs are using 2P. So, WHO is using 4P systems then?!?!?

Also, I noticed that the #2(Nebulae) is using Tesla card(s). Do you think AMD has an advantage over Intel in this regards? I would expect more Top500 computers to begin using GPGPU computing in a few years, I'd say 1/3 of the HPCs will use GPGPU tech by 2020.
October 5, 2010 6:14:45 PM

4P is database and virtualization, mostly.

There are more customers looking at GPGPU, but there are some underlying software things that need to happen in order to really have that become more mainstream for servers.

I am not sure that I would be comfortable putting a number on the GPGPU percentage, it is too difficult to determine at this point.
a b à CPUs
October 5, 2010 9:29:02 PM

Quote:
There are more customers looking at GPGPU, but there are some underlying software things that need to happen in order to really have that become more mainstream for servers.

True, but you know these things will eventually trickle down to the mainstream level. Software is indeed holding stuff back, mainly, there needs to be more languages that allow for multi threading to be used with ease.
If you think about it, a current gen 2P server is probably have about the same performance as the first super computers.
October 5, 2010 9:33:50 PM

In 1969 my iphone could have put a man on the moon. And played The Replacements' "Pleased to Meet Me" the whole way there.
a b à CPUs
October 5, 2010 9:44:43 PM

^ lol. Well played sir, well played in deed.
a b à CPUs
October 5, 2010 10:06:13 PM

jf-amd said:
In 1969 my iphone could have put a man on the moon. And played The Replacements' "Pleased to Meet Me" the whole way there.


That's assuming the astronauts "held it right" :D .
a b à CPUs
October 5, 2010 10:37:37 PM

fazers_on_stun said:
That's assuming the astronauts "held it right" :D .



+1

Edit:
That made me spit beer. Alcohol abuse, so -2.
!