I am Gourab,system design engg of Wipro Tech. Can you please tell me what is the difference between core two duo and core i3 and upper versions.
It sounds like you need a little background on Intel CPUs.
- Intel introduced the all-new P6 microarchitecture in the Pentium Pro server CPU in 1995. It was Intel's first x86 architecture with out-of-order execution, a three-issue width, and the ability to use L2 cache running faster than the FSB speed.
- The Pentium P54's MMX was added to P6 to make the Pentium II. SSE was added to the Pentium II to make the Pentium III.
- Intel retired the P6 microarchitecture in the Pentium III as they had developed the all-new NetBurst microarchitecture for the Pentium 4.
- The Pentium 4 made for a poor laptop chip as it ran too hot, so Intel's Haifa, Israel development team gave the Pentium 4's SSE2 instruction set and a couple of other tweaks like micro-op fusion to the cooler-running Pentium III's P6 microarchitecture to make the P6+ microarchitecture. They used this P6+ microarchitecture along with the Pentium 4's quad-date-rate FSB to make the Pentium M. The Pentium 4 Prescott's SSE3 instruction set was added to the P6+ microarchitecture in the Pentium M's dual-core successor, the Core Duo.
- AMD was walking all over Intel's NetBurst-based Pentium 4s, Pentium Ds, and Xeons in the desktop/server market with the Athlon 64 and Opteron. Intel's first go at redesigning the original NetBurst microarchitecture created the 64-bit-capable "Prescott" with a massively-long 31-stage pipeline. This served to do little to increase performance over the previous 20-stage Northwood P4s but pushed heat output up even further. Intel tried again with the Jayhawk/Tejas CPUs but those ran even hotter and performed even worse than the Prescotts, so those CPUs were never actually produced. Intel was in panic mode and turned to the Haifa team again to make a desktop CPU. The Haifa team took the Pentium M/Core Duo's P6+ and made a fair amount of changes to it, adding 64-bit long mode capability, greatly increasing the FPU performance, and increasing the issue width to four instructions. This became the "Core" microarchitecture used in the Core 2 CPUs.
- The Core microarchitecture was tweaked further with the introduction of the Nehalem microarchitecture in 2008. The big additions were to add the Pentium 4's HyperThreading due to the rise of multithreaded applications and to increase single-threaded performance by increasing core speeds in lightly-loaded conditions with Turbo Boost. Turbo Boost did exist in a very crude form on some of the last Core 2 laptop CPUs, but Nehalem greatly increased the speeds available. Most Nehalem CPUs also have their memory controller on the CPU die and all cores on one die like AMD has done since the Athlon 64 and Opteron in 2003/2004, which was a big change from Intel's previous designs. The Core i3/i5/i7s with three-digit model numbers (e.g. Core i3-530) are based on the Nehalem microarchitecture.
- New 256-bit-wide SIMD instructions were added to Nehalem to create Sandy Bridge. Sandy Bridge mostly differs from Nehalem in the CPU floorplan with a ring bus replacing the crossbar used in Nehalem for inter-core communications, bringing the GPU into the actual CPU die and letting it access the L3 cache, and adding some fixed-function video hardware into the CPU die. The Core i3/i5/i7 CPUs with a four-digit model number (e.g. i7-2600) are based on Sandy Bridge.
Possibly, but if it is this guy>
Team Leader at Wipro Technologies
Kolkata Area, India | Information Technology and Services
Current: Team Leader at Wipro Technologies
Past: Project Engineer at Wipro Technologies (Contract), Software Developer at Riddhi Geo Information Systems Pvt. Ltd.
Education: Bankura Unnayani Institute Of Engineering, Ramakrishna Mission Boy's Home, Rahara
Summary: 5+ years of experience in Software Design & Development and Database in a wide variety of business applications. Particularly interested in c...'
C&p'd from http://www.linkedin.com/pub/dir/Gourab/Guha
I would expect a modicum of knowledge relating to processors, maybe I was a tad off from my usual helpful self, and I apologise for that but I call em like I see 'em...
and seriously, the inability to google things is fast becoming a epidemic