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Has intel marketed away the l1 cache?

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  • CPUs
  • Chip
  • Cache
  • Intel
Last response: in CPUs
February 24, 2011 6:37:59 PM

Larger l1 cache = more transistors on die = less chip yield per wafer = lower profit for intel

A l1 cache runs at chip speed which is 2x faster than the l2 and l3 caches that run at bus speed.

Other than that, I don't have a low level understand of CPU hardware, but hasn't every other aspect of intel CPUs gotten bigger, better and faster, but l1 cache has been left in the dust?

Would a larger l1 cache on modern intel CPUs be beneficial for generalized computing?

It appears that Intel has downplayed the l1 cache over the years, you know? At the time, my PowerPC G5/G4 was amazing and that chip had a huge l1 cache. My xbox 360 has a g5 at the helm and that system is still current.

More about : intel marketed cache

February 24, 2011 6:45:28 PM

Interesting, the ps3 has a huge 512k l1 cache
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February 24, 2011 6:46:20 PM

The larger the cache the longer it takes to search through, thats why caches go up in sizing, its not just the transfer rate of the cache that matters, if you have a cache thats 8 times the size with the same associative properties it will take 8 times as long to discover you missed then you have to go search an even bigger one, it will also take you about 4 times as long on average to find the data even if you hit.


With the good caching we have today, the hit rate is usually pretty high, often ~80% or better so you would prefer your first level cache to be really small and fast to search through so you can find your hits quickly, so rather than increase the size and slow down the most commonly checked place they added the L2 and L3 caches, the L3 cache these days is bigger than many old systems secondary long term storage was, so with the L2 and the L3 there is really no reason to increase the size of the L1.
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February 24, 2011 6:52:44 PM

Best answer selected by Michaelvoigt.
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February 24, 2011 7:19:28 PM

The Intel® Pentium® 4 Processor supporting HT Technology 3.20 GHz, 512K Cache, 800 MHz FSB had right around 55 million transistors. The Intel® Core™ I7 950 has 731 million transistors. The problem with your question is that you are assuming that the other processors that you talked about would be able to compete with current processors like the Core I7 950 because they have a high amount of level 1 cache nothing could be farther from the truth. Each one of the processors that you mentioned was designed for a set environment where they would face limited software and hardware. Unfortunately new Intel processors don’t have that option. Everyone builds their PC’s differently and because of that the a larger L2 and L3 cache has much more value on processors today.

Christian Wood
Intel Enthusiast Team
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February 24, 2011 7:20:54 PM

The reason for gaming consoles having bigger L1 caches is that they arent multitasking, since its really only running a single thing its much more predictable so they can do some deeper associativity to improve the look up rate while avoiding cache thrashing since its well known exactly what hardware the software will run on so it gets optimized for that and can include cues to the hardware as to what will come next.
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August 19, 2011 6:19:59 PM

hunter315 said:
The reason for gaming consoles having bigger L1 caches is that they arent multitasking, since its really only running a single thing its much more predictable so they can do some deeper associativity to improve the look up rate while avoiding cache thrashing since its well known exactly what hardware the software will run on so it gets optimized for that and can include cues to the hardware as to what will come next.



xenon and cell's l1 cache aint bigger than intel's core/p6 line(scaling from pentium pro's 16kb/c to core's 64kb/core then haswell's 128kb/core), xenon is strip down powerpc g5(as big as core 2 duo) and only have 32kb(16kb data + 16kb instruction) and unlike core 2/core i which runs dedicate on each core xenon's l1 cache is share with all SPE as well as L2/L3 and on the other side cell may have bigger L1 cache(32kb instruction + 16KB data) but it had to share with8 SPE and each SPE can capable having up to 4 SMT per SPE.....only power series has larger L1(128kb Instruction + 128kb data) cache than intel offer but base on way too different architecture it is hard to put 2 in comparison but intel processor may have the edge because their L1/L2 are dedicate for each thread than share it(PS: hyper threading is use L3 cahce for read/store)

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