DMA Cascade

[jinkazuya]

Well...As stated in the top of the thread. I am just wondering how the two controllers of the DMA Cascade are linked. I have done an extensive of research and have read several books, none of which really illustrate and talk about this in details.

According to the book I read, it is said that the first controller is linked to the second controller and this is done through DMA channel 4. But how do both controller get linked isn't mentioned in the book?

Because there are 8 channels of DMA 0 - 3 for controller one, 5 - 7 for controller two. So the question is
Does DMA 4 appear on both of the controller? so DMA 4 of the first controller is linked with the DMA 4 of the second controller?

Or

Does the second controller contain 4 - 7 DMA? But then what channel of the DMA of the first controller is linked to the DMA 4 of the second controller? It is a bit confusing. And I really don't get it.

 

[GhislainG]

The first DMA controller is cascaded to the second DMA controller. DMA 0, 1, 2 and 3 are on the first controller and DMA 5, 6 and 7 are on the second one. DMA 4 on the second one is not usable as it's used to cascade the first one (you can't use a DMA channel to link it to another DMA channel). For more info you can read http://www.pcguide.com/ref/mbsys/res/dma/func.htm

DMA controllers were used on XT and AT PCs (ISA and EISA bus).

 

[jinkazuya]

I have read the article...But it just says DMA 4 on the second one is used to cascade the first one. But the article does not illustrate how DMA 4 is cascaded to the first controller.

Because the IRQ does the routing, routing from the IRQ 9 to IRQ 2 and then transfer info to the processor. But since DMA 4 doesn't do the rerouting as IRQ, how is it cascaded? I just wanna see the picture of it.

 

[GhislainG]

You want to see a diagram? Look at Figure 4: http://zet.aluzina.org/images/8/8c/Intel-8237-dma.pdf

Note: Only look at the first and the second level.