Hi All,
I had a few questions for the experts here at Tom's.
For no apparent reason, I became interested in the single thread computational performance of various CPU's (ie. Is a 3Ghz P4 faster than 1 core of a 2Ghz C2D)... Well.. It quickly became apparent that the answer was no... lol..
It did however lead me into some interesting thoughts (at least interesting to me) in that I noticed that a P4, transistor for transistor was more efficient than a wolfdale C2D.
This lead me to some interesting questions that I do not know the answer to. I was hoping that someone here could enlighten me.
Why is performance per transistor going down? Is it due to the physical limitations of the transistor shrinks causing a loss of efficiency, or is it completely a design implementation issue? As an example of what I mean. If a 55million transistor 130nm northwood P4 was built using today's tech (45nm as I write this) so that it was a 55million transistor 45nm P4 and all logic stayed the same, would it perform less efficiently due to changes in the transistor manufacture?
If the answer to the above question is no. Would it not then be better to have an 8 core P4 3Ghz Northwood at 55million 45nm transistors per core than to have 2 205million 45nm Wolfdale cores? The "new" P4 would then have 2x the overall computational performance?
Anyway, I would love to understand this, and I wrote a little benchmark program with some charts of my CPU's I have at home and work. I would also love to have more data from my program from OLD CPU's, PII's and P-MMX etc. if anyone has that kind of stuff lying around.
You can download and run my small program from http://astro.temple.edu/~drhoads/cpu if you want to help me collect data.
Thanks to anyone for their answers or additional data.
I had a few questions for the experts here at Tom's.
For no apparent reason, I became interested in the single thread computational performance of various CPU's (ie. Is a 3Ghz P4 faster than 1 core of a 2Ghz C2D)... Well.. It quickly became apparent that the answer was no... lol..
It did however lead me into some interesting thoughts (at least interesting to me) in that I noticed that a P4, transistor for transistor was more efficient than a wolfdale C2D.
This lead me to some interesting questions that I do not know the answer to. I was hoping that someone here could enlighten me.
Why is performance per transistor going down? Is it due to the physical limitations of the transistor shrinks causing a loss of efficiency, or is it completely a design implementation issue? As an example of what I mean. If a 55million transistor 130nm northwood P4 was built using today's tech (45nm as I write this) so that it was a 55million transistor 45nm P4 and all logic stayed the same, would it perform less efficiently due to changes in the transistor manufacture?
If the answer to the above question is no. Would it not then be better to have an 8 core P4 3Ghz Northwood at 55million 45nm transistors per core than to have 2 205million 45nm Wolfdale cores? The "new" P4 would then have 2x the overall computational performance?
Anyway, I would love to understand this, and I wrote a little benchmark program with some charts of my CPU's I have at home and work. I would also love to have more data from my program from OLD CPU's, PII's and P-MMX etc. if anyone has that kind of stuff lying around.
You can download and run my small program from http://astro.temple.edu/~drhoads/cpu if you want to help me collect data.
Thanks to anyone for their answers or additional data.