Hello all. I am currently a CS student and finishing up my first hardware course. Although I am not the best student, I absolutely love the course. These forums look like an oustanding place to obtain knowledge. If I am posting this in the incorrect place, or im beaitng a dead horse (which I very well might be), I am sorry
I have some general questions, and other questions on the CPU clock vs RAM internal clock. If anyone can tell me if my thoughts are incorrect and add any insight to my questions it would be much appreciated. ANY help on any of my questions or any discussion is highly appreciated. Thanks
NOTE: I would like to express my ideas using terminology I used in class.
CPU
From what I understand so far, the Hz label on the CPU is the time per clock pulse the cpu operates at. For example, a 3.0 GHz processor performs some operation every 1/(3 x 10^9) seconds or every .33 ns per clock pulse.
#1) If the oscillating crystal is on the motherboard, how does the crystal know at what clock frequency to pulse at? I would assume that a crystal pulsing faster then what a CPU is supposed to operate at will cause a BSOD OR... new control signals will be applied to the datapath before all operations are complete leading to missing bits, failure to load all bits to the IR, failure to apply the correct address to the MAR etc.
#2) By saying a CPU is 32 bit or 64 bit, that means the ALU/registers can perform operations on this many bits simultaneaously?
#3) Can the frequency of the crystal be manipulated by changing the voltage?
#4) When people overclock, what are they physically tampering with in the cpu? From my studies all I see is combinational/sequential circuitry. Certainly they arent changing the speed their latches and AND gates work, right?
RAM
The ram is on its OWN clock. So by my math a 1333 Mhz stick of ram sends its OWN pulse every 1/(1333x 10^6); pulses every .75 ns.
#1) I think that the memory controller (on the RAM itself) counts this pulses and releases its own pulse?
#2) So if the CPU pulses and the pulse happens to be the one that starts the domino reaction in memory, is the time it takes for a write cycle or access cycle within ONE memory clock pulse? I know these cycles can last multiple CPU clocks. But does it take ONE memory pulse to apply the RAS, another to apply the CAS etc or does this happen before the first negative edge of the memory clock?
#3) I assume DDR ram works on positive and negative edges of the MEMORY clock, not the CPU clock?
#4) Does the word size have to be the same same number of bits as the amount of bits the CPU can handle? 32 bit CPU requires 32 bit word memory?
Together, a limiting factor can be the RAM. If there was some way to make RAM get an instruction to the instruction register by the first negative edge of the CPU clock after the address is applied to memeory then the RAM would be operating at the same frequency as the CPU? I'm assuming this technology isnt here yet because we have to wait for the RAS,CAS, decoder and mux delays which span multiple CPU clock cycles.
OK any clarification, insight and other knowledge is appreciated. Thanks in advance everyone.
I have some general questions, and other questions on the CPU clock vs RAM internal clock. If anyone can tell me if my thoughts are incorrect and add any insight to my questions it would be much appreciated. ANY help on any of my questions or any discussion is highly appreciated. Thanks
NOTE: I would like to express my ideas using terminology I used in class.
CPU
From what I understand so far, the Hz label on the CPU is the time per clock pulse the cpu operates at. For example, a 3.0 GHz processor performs some operation every 1/(3 x 10^9) seconds or every .33 ns per clock pulse.
#1) If the oscillating crystal is on the motherboard, how does the crystal know at what clock frequency to pulse at? I would assume that a crystal pulsing faster then what a CPU is supposed to operate at will cause a BSOD OR... new control signals will be applied to the datapath before all operations are complete leading to missing bits, failure to load all bits to the IR, failure to apply the correct address to the MAR etc.
#2) By saying a CPU is 32 bit or 64 bit, that means the ALU/registers can perform operations on this many bits simultaneaously?
#3) Can the frequency of the crystal be manipulated by changing the voltage?
#4) When people overclock, what are they physically tampering with in the cpu? From my studies all I see is combinational/sequential circuitry. Certainly they arent changing the speed their latches and AND gates work, right?
RAM
The ram is on its OWN clock. So by my math a 1333 Mhz stick of ram sends its OWN pulse every 1/(1333x 10^6); pulses every .75 ns.
#1) I think that the memory controller (on the RAM itself) counts this pulses and releases its own pulse?
#2) So if the CPU pulses and the pulse happens to be the one that starts the domino reaction in memory, is the time it takes for a write cycle or access cycle within ONE memory clock pulse? I know these cycles can last multiple CPU clocks. But does it take ONE memory pulse to apply the RAS, another to apply the CAS etc or does this happen before the first negative edge of the memory clock?
#3) I assume DDR ram works on positive and negative edges of the MEMORY clock, not the CPU clock?
#4) Does the word size have to be the same same number of bits as the amount of bits the CPU can handle? 32 bit CPU requires 32 bit word memory?
Together, a limiting factor can be the RAM. If there was some way to make RAM get an instruction to the instruction register by the first negative edge of the CPU clock after the address is applied to memeory then the RAM would be operating at the same frequency as the CPU? I'm assuming this technology isnt here yet because we have to wait for the RAS,CAS, decoder and mux delays which span multiple CPU clock cycles.
OK any clarification, insight and other knowledge is appreciated. Thanks in advance everyone.