cl2, cl3 and non-parity?

chogb

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Dec 31, 2007
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i just got the following prices for memory.

its all crucial branded.

could someone enlighten me to the exact meaning of :

1. CL2&CL3 (speed?)

2. ECC (meets certain standard?)

3. non-parity

thanks a lot

chog

prices from www.dabs.co.uk :

256Mb 168Pin DIMM PC133 SDRAM Non-Parity CL3
Mfr code: CT32M64S4D75
Quicklinx: SHVWS
3-4 days £93.59 £109.96

256Mb 168Pin PC133 SDRAM Non-Parity CL2
Mfr code: CT32M64S4D7E
Quicklinx: SHWWS
3-4 days £117.89 £138.52

256Mb 168Pin DIMM PC133 SDRAM ECC Registered CL3
Mfr code: CT32M72S4R75
Quicklinx: SHXWS
Overdue £124.19 £145.92

256Mb 168Pin DIMM PC133 SDRAM ECC Registered CL2
Mfr code: CT32M72S4R7E
Quicklinx: SHYWS
3-4 days £186.29 £218.89
 

JOJO

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CL2 and Cl3 are the CAS Latency timings, can be reffered to as CL 2-2-2 , or CL 3-3-3

This is the Lateness (real word?) of the ram suppling information. Cl2 gives every 2 cycles and CL3 gives every 3
cycles. THerefore, CL2 is better.

ECC is error checking and correction or error correction code. It is primarily used in high-end servers and stuff and makes sure that all the binary numbers are correct when they come out of the ram, and will correct any if a mistake is found.

For any normal user, ECC isn't needed.

As for parity,

I Dunno :)

In your case, go with

256Mb 168Pin PC133 SDRAM Non-Parity CL2
Mfr code: CT32M64S4D7E
Quicklinx: SHWWS
3-4 days £117.89 £138.52

You can also see these markings on the actual chips themselves (like CAS timings , speed and all that stuff) to make sure you didn't get cheated.

hope that helps
 

chogb

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thanks for your help,

just to add more info, i'm planning to use at least 512mb in a single or maybe dual 1Ghz pentium system for use with Maya 3d modelling and rendering and digital video work.

cheers

chog
 

Arrow

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Dec 31, 2007
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For your uses, you'd probably want some CAS2.

Rob
Please visit <b><A HREF="http://www.ncix.com/shop/index.cfm?affiliateid=319048" target="_new">http://www.ncix.com/shop/index.cfm?affiliateid=319048</A></b>
 

Tempus

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Just for your info, parity modules have an extra chip that detects if data was correctly read or written by the memory module, depending on the type of error. However, it will not correct the error like ECC does.

- "I forgot my shirt, but I had body glitter."
 

JOJO

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I just read somewhere that parity is an addition of a 0 or 1 bit at the end of a binary number that tells the parity checker if there is an odd or even number of 1's in the code.

This is checked later and if a 1 or 0 gets changed, the parity bit will not match and thus tells the checker that there is an error.

Of course if a 0 errs to a 1 and a 1 errs to a 0, the parity check will not catch it and thus the error would slip by.