Would this fix AMDs module design?

I remember a while back I read an article that said intel was working on a way to make a single threaded app multi threaded on the proccessor level, kinda like hyper threading but backwards. If AMD could implement something like this on their 8 core CPUs so each module acted like one single processor with one thread, I think that it could justify AMD modules even with just a 50% increase in performance, with no L1 cache it is already setup for something like this.
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  1. although things like this would help, it doesn't dodge the fact that the FX series chips share have physical shared resources. really, single threaded performance is what is lacking in the FX compared to the intel counterparts. The FX-8320/50 can trade blows with the i7 on specific cases multithreaded wise. but as for now, AMD's main focus is the APU business as well as more of an emphasis on the mobile market and HSA, which is where the market is going, and intel's presence is alot more missing in.
  2. You cannot make a single threaded app multi-threaded using hardware
    - Without L1 cache you say?, really?

    That article was probably totally off the mark and written from incorrectly formed interpretations of a technical document.

    Wouldn't surprise me if there was a language translation problem somewhere along the line too.

    You can increase ILP, but that is normal and done with every new processor generation anyway.
    - http://en.wikipedia.org/wiki/Pentium_Pro
    - Idea predates November 1, 1995
    - In fact, if I was at AMD right now, I would suggest RETRAINING THEIR ENGINEERS starting with the Pentium Pro slides from 1995.
    - They clearly don't get it, or are targeting highly consolidated micro servers.
    - BogoMIPS might be high, but the actual performance will be 'less than half' each time they try it.

    AMDs 8 core consumer processor has 'reverse HyperThreading' already if that's what you meant
    - It reduces performance by 3% to 80% for a given workload by trying to do something very foolish.
    - The cores share resources internally, but they do a very poor job of it.
    - It's basically AMDs implementation of SMT (HyperThreading to the Intel folk) and they really borked it up.

    It's really just a quad-core CPU.
    - AMD technical notes even suggest disabling 'every 2nd core' to increase performance.

    This 'analysis' of the Athlon XP/MP comparing it to the HP/DEC/Compaq Alpha 21264 should be on every AMD employees cubical wall!
    - http://www.azillionmonkeys.com/qed/cpujihad.shtml

    That is how AMD used to make good CPU's.
    - Their '8 core' lie is a total step in the OPPOSITE direction to what made the Athlon the Athlon in the first place!

    Basically it's like selling a 4 cylinder car and saying it has 8 cylinders,... should be illegal!
    - Their '8 core CPU' is totally misrepresented, and their 'fans' will just suck it up...
  3. Technically, AMD's CMT is about 80% efficient, due in part to the shared frontend. Better then HTT by a long shot (10% at best), but takes a LOT more die space.

    Understand that BD was designed for servers: Hence its CMT cores and high Integer throughput, but lower IPC and FP throughput. Problem is, desktop users need IPC and FP throughput.

    In typical server loads, BD > SB. For just about everything else though, the reverse is true.
  4. AMD has a fix for BD. It's called Steamroller. It addresses primarily the instruction decode bottleneck in the BD.

    Unfortunately it's been delayed until 2014 or possibly indefinitely if AMD doesn't get their act together quick.
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