One thing I read is that current CPU design (silicon transistors) will hit a brick wall at a certain size/transistor count. You can only get the transistors so close together. Let's check some math here...
At .25 micron the Athlon classic had 22 million transistors and a 184 square millimeter (sm) die size, or 119,000 transistors per sm. The shrink to .18 micron dropped that die size to 105 sm, or 209,000 transistors per sm. At .18 micron the Palomino had 38 million transistors and a die size of 128 sm, or 296,000 transistors per sm. At 0.13 micron the Thoroughbred will have 38 million transistors and a die size of 80 sm, or 475,000 transistors per sm. The rule seems to be that for every 28% process shrink (.25 to .18, .18 to .13), you get about 1.6-1.75 times as many transistors per square millimeter. For the Pentium 4, it comes out to be 2 times as many transistors per square millimeter for that die shrink. Let's be generous and make that 2.5 times as many transistors per sm for every 28% die shrink, allowing for future technologies.
So, for every 28% micron shrink, you'd get thrice the transistors per area. So starting at 475,000 transistors per sm at .13, another 28% drop to .09 micron would yield 1,062,500 transistors per sm. A 28% drop to .065 micron would yield 2,656,250 transistors per sm. If we continually drop the size to size to .01 micron (7 "steps" of 28% from .13 micron), you'd get about 290,000,000 transistors per square millimeter.
With that number, a 1 trillion transistor count chip at 0.01 micron would then be 3,500 square millimeters in size!!!!!!! That's nearly an 2.3 inch by 2.3 inch die size, which really big and pretty impossible. Now, let's srink the process down to 0.005 micron you'd then have still have a 555 square millimeter die size, or 1 inch by 1 inch, which is still pretty huge.
This is interesting, and doesn't bode well for a 1 trillion transistor chip in 20 years. Of course these number's aren't perfect, but I think they're pretty good, and probably pretty accurate, if not a little too generous. In 20 years time, we probably will have abandoned silicon transistors and replaced them with chemical, DNA, or quantum computers.
But, just to show you how greatly these numbers can vary, if 2.5 time was changed to 2 times, the die size at .01 micron would be 5 inches by 5 inches (16,450 sm) and at .005 2.5 inches by 2.5 inches (4,100 sm). However, if it were 3 times instead of 2.5 times the die size at .01 micron would be 1.25 inches by 1.25 inches (1,000 sm) and at .005 micron it would be 111 square milimeters, which would work just fine.
Any thoughts, corrections, additions?
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