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reg ,cas2, ecc DDR ???

Last response: in Memory
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January 11, 2002 9:11:07 AM

what's the difference between al that DDR
there is :
reg DDR
ECC DDR
cas2 DDR

I am starting to be confused.


<P ID="edit"><FONT SIZE=-1><EM>Edited by SebaVDP on 01/11/02 06:11 AM.</EM></FONT></P>

More about : reg cas2 ecc ddr

January 11, 2002 2:57:40 PM

ECC is RAM with ECC check, the memory will check for memory errors but this will decrease performance. This is best for servers.
CAS has to do with memory timings, the lower the value the better.

My case has so many fans that it hovers above the ground :eek:  .
January 11, 2002 3:27:34 PM

So every DDR-RAM has CAS.
Why don't they write it every time.

And what is reg --> registed
what's the diff with non-reg?
Is it faster?

My mobo(abit kr7a) tells me with reg DDR I can put 4Gig RAM
with normal RAM I can only put 3Gig RAM.
January 11, 2002 7:16:22 PM

Registered memory has a specific slot designed to fit it. The alternative which is what is in most desktop computers is Unbuffered. Registered/Buffered memory means that there is a buffer between the memory module and the MCH. (Memory Controller Hub) The buffer allows for a delay between the memory modules and the MCH as to not overload the controller. Servers us this because they normally have more DIMMs or RIMMs occupied. The buffer allows for a decreased chance of addressing conflicts.


CAS is a latency timing setting. It stands for Column Access Strobe. It is calculated as such.

CL >= tCAC / tCLK

CL is the CAS Latency.
tCAC is Column Access Time.
tCLK is Length of Clock Cycle.

So say for CL2, it means that the strobe value is set a ratio of 2:1. In example say the memory is PC133. PC133 runs at 133MHz, which equates to approximately 7.5188ns. (ns = nanoseconds) For a setting of CL=2 means that the Column Access Time is twice as long as the clock length of time.

CL >= tCAC / tCLK

2 >= tCAC / 7.5188

So the tCAC value, or Column Access Time length, equals 15.038ns.

ECC means Error Correction Code or Error Correcting Code. ECC verifies the correctness of each word, "packet of data." ECC uses 7 bits to verify a packet of 32 bits and 8 bits for 64 bit packets. (Hence there is better accuracy.) It can find a single mistake and correct it based on the idea of looking for a change in the stream the data. But it also cannot fix more than a single error in a word. If there are 2 or more errors it can only report an error. Multiple errors in a word/packet are rare but they do happen whereas single bit errors are more common.

<b>"The events of my life are quite inconsequential.." - Dr. Evil</b> :lol: 
!