lhgpoobaa

Illustrious
Dec 31, 2007
14,462
1
40,780
what precisely is the difference between DDRII and DDR besides a plain clock speed increase?

The lack of thermal protection on Athlon's is cunning way to stop morons from using AMD. :)
 

lhgpoobaa

Illustrious
Dec 31, 2007
14,462
1
40,780
right... i getcha...
im not unfamiliar with TBGA, as i own 2 sticks of kingmax PC150 made using that process.

all i just want is good quality PC3200 out NOW.
(and able to do cas 2 as well!)

dont ask for much do i?


The lack of thermal protection on Athlon's is cunning way to stop morons from using AMD. :)
 

bum_jcrules

Distinguished
May 12, 2001
2,186
0
19,780
DDRII is not SDRAM. It is SRAM. It will have SRAM for row addressing. It will eliminate one latency set which is composed of two physical latencies; RAS and the pause between RAS and CAS. (These are show in <font color=red><b>RED</b></font color=red>.) When QDR comes out it will be SDRAM, but DDRII and QDRII will be SRAM memory types.

For DDRSDRAM there are 7 settings...

1. SDRAM PH Limit: 1, 4, 8, 16 page hits

2. SDRAM Idle Limit: 0, 8, 12, 16, 24, 32, 48 cycles

3. tRC Timing: 3, 4, 5, 6, 7, 8, 9 cycles

4. tRP Timing: 3, 2, 1, 4 cycles

<font color=red><b>5. tRAS Timing: 2, 3, 4, 5, 6, 7, 8, 9 cycles</font color=red></b>

6. CAS Latency: 2, 2.5, 3 cycles

<font color=red><b>7. tRCD Timing: 1, 2, 3, 4 cycles</font color=red></b>

Also...

DDRII, QDR, and QDRII will have two clock generators instead of the traditional single clock generator. This will speed addressing but will cause an added latency which will have to verify the open bank for adressing a write sequence. Overall it will increase the speed of addressing because it can read and write from two diffrernt clocks.

BTW...(Not to be too much of an A-type personallity.)

DDRII, QDR, and QDRII will be using FBGA or Fine-Pitch Ball Grid Array. It will have 165 pins instead of the 66 used by the DDRSDRAM of today.

<b>"I'll have a steak sandwich and a steak sandwich." - Fletch</b> :lol: