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rambus + DDR???

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Anonymous
a b } Memory
March 25, 2002 1:46:22 PM

ive been wondering -
is it theoretically possible to fuse the 2 technologies (rambus and DDR)? it seems as though one doesnt hurt the other.
appreciate any input

More about : rambus ddr

March 25, 2002 4:13:21 PM

I'm confused by what you mean. How would you fuse the two technologies?

<font color=blue>If you don't buy Windows, then the terrorists have already won!</font color=blue> - Microsoft
March 25, 2002 4:26:48 PM

Technically RDRAM is DDR in serial. It has one bit on the rising and one on the falling edge of the signal. It is just that DDR noted as DDR-SDRAM and RDRAM is RDRAM. Hey, they wanted their name on the technology and you cannot tell how it operates by the name alone.

See <A HREF="http://www.kingston.com/tools/umg/default.asp" target="_new">this link from Kingston</A> for more details on RDRAM operating two bits per cycle. See the 50th page in the PDF file which is Page 57 in the guide. The title is "Direct Rambus."

Direct Rambus® is a new DRAM architecture and interface standard that challenges traditional main memory designs. Direct Rambus technology is extraordinarily fast compared to older memory technologies. It transfers data at speeds up to 800MHz over a narrow 16-bit bus called a Direct Rambus Channel. This high-speed clock rate is possible due to a feature called “double clocked,” which allows operations to occur on both the rising and falling edges of the clock cycle. Also, each memory device on an RDRAM module provides up to 1.6 gigabytes per second of bandwidth – twice the bandwidth available with current 100MHz SDRAM.

<b>"I put instant coffee in the microwave and almost went back in time" - Steven Wright</b> :lol: 
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Anonymous
a b } Memory
March 25, 2002 8:17:18 PM

what i meant was...
since ddr uses both edges of the clock for transfer as opposed to standard sdram, could rdram possibly employ similar 2 bits per clock transfer? and apparently it already does as Bum_JCRules pointed out, thanks Bum JC, im currently reading through kingston ram stuff. appreciate the link.

btw nice sig FatBurger
March 25, 2002 11:52:41 PM

Ohh, I see what you mean. Basically, 800MHz DDR RAM? You're looking at one problem: HEAT!

AMD technology + Intel technology = Intel/AMD Pentathlon IV; the <b>ULTIMATE</b> PC processor
March 25, 2002 11:59:27 PM

no.
rdram is completely different, it runs in a serial fashion.
ddr uses a parallel protocol

besides... why would u want to?

Morally destitute, Emotionally bankrupt but a proud and respected member of Toms Forums! :smile:
Anonymous
a b } Memory
March 26, 2002 12:49:06 PM

ok,
could you enlighten the ignorant: a link or an brief explantion of parallel/serial protocol, thanks

i just figured doubling (as with SDRAM*2 = DDR) rdram transfer would give a nice performance boost, like amd_man was saying 800 mhz DDR, despite the heat - if that will be a serious problem.
March 26, 2002 3:10:57 PM

Parallel:
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Serial:
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<font color=blue>If you don't buy Windows, then the terrorists have already won!</font color=blue> - Microsoft
March 26, 2002 4:11:45 PM

RDRAM <b><font color=red><i>does</i></font color=red></b> run with a bit on the rising edge and falling edge of the signal. It runs at double data rates.

Look at bandwidth calculations...

You know that PC800 has 1.6GB/s bandwidth. How is that calculated???

800MHz x 2 bytes per clock (or bytes per cycle {MHz = Cycles/Second}) = 1600MB/s = 1.6GB/s (or 12,800,000,000 bits per second.)

The <A HREF="http://www.intel.com/design/chipsets/850/index.htm?iid=..." target="_new">clock generator runs at 400MHz</A>. 400MHz x 2 (DDR) = 800MHz. (The cycle has two bits per wave.) It is "double pumped." (For more documentation on the system clock in the MCH, Memory Controller Hub, see <A HREF="http://www.intel.com/design/chipsets/datashts/290691.ht..." target="_new">here for the Intel 82850 MCH Datasheet</A>.)

There are two, 2, bits per cycle. One happens to be on the rising edge and one is on the falling edge.

<A HREF="http://www.hardwarecentral.com/hardwarecentral/print/16..." target="_new">"<b>RDRAM vs. SDRAM</b>


RDRAM promises a bandwidth twice that of PC100; well, true to some extent, but only valid if comparing PC800 RDRAM with PC100 SDRAM. PC800? PC100? Confusing to say the least, as that would suggest that PC800 is 8X the speed of PC100. Upon closer examination, RDRAM uses a 2 byte (16 bit) wide databus versus SDRAM's 8byte (64 bit) wide databus.

Furthermore, the PC800 rating is a bit confusing, as PC800 RDRAM is actually a double-pumped module operating at 400 MHz clockspeed. Double-pumped simply means data is transferred to the RDRAM on both the rising and falling edge of the clock, often referred to as double data rate (DDR), creating an effective 800 MHz memory rating. PC100 SDRAM is referred to as single data rate (SDR) and operates at 100 MHz clockspeed; it can only transfer data on the rising edge of the clock, thus having an effective 100 MHz memory rating.</A>

Does this finally settle confusion about the incorporation of the two technologies? RDRAM already runs as DDR.

The major differences are...

1. RDRAM is serial and DDR SDRAM is parallel.

2. The data buses. (SDRAM is 64 bits wide and RDRAM is 16 bits wide.)

3. The latencies are different. (Architecture is different and the timing, signals, and strobes are different. PC100 SDRAM has a latency of about 90ns (nanoseconds) and RDRAM PC800 has a latency of about 67.5ns. (DDRSDRAM is a little higher than SDRAM, clock for clock that is, because of the additional timing sets.)


Number of channels, ECC, Registered, and most of the other arrangements are practically the same.

<b>"I put instant coffee in the microwave and almost went back in time" - Steven Wright</b> :lol: 

Edit:
The number of bits in my previous calculation was incorrect. The corrected number is listed above.
March 26, 2002 6:06:30 PM

Quote:
800MHz x 2 bytes per clock (or bytes per cycle {MHz = Cycles/Second}) = 1600MB/s = 1.6GB/s (or 1,600,000,000 bits per second.)

The clock generator runs at 400MHz. 400MHz x 2 (DDR) = 800MHz. (The cycle has two bits per wave.) It is "double pumped." (For more documentation on the system clock in the MCH, Memory Controller Hub, see here for the Intel 82850 MCH Datasheet.)


You realize you double-pumped it twice?

<font color=blue>If you don't buy Windows, then the terrorists have already won!</font color=blue> - Microsoft
March 26, 2002 6:19:00 PM

FB,

I trust your judgement. I did have a error but it was the bit calculation. I corrected it above. Please explain the "twice" scenario, I still don't see it.

Here is the logic as I have always percieved it. (Remember that huge thread that Ray started on bandwidth? I think that was a year ago. Anyway...)

If the Clock generator runs at 400MHz and it uses a DDR signal, you end up with a realized 800MHz signal.

RDRAM has a 16 bit data pathway.

Put the two togwther and you get a theoretical bandwith of:

800MHz = 800,000,000 cycles per 1 second

16 bits = 8 bits x 2 = 2 Bytes

800MHz x 2Bytes = 12,800,000,000 bits per second = 1.6GB/s

<b>"I put instant coffee in the microwave and almost went back in time" - Steven Wright</b> :lol: 
March 26, 2002 8:08:40 PM

Yes, this calculation is correct.

Look at my quote, and see that you have both 800MHz double-pumped, and 400MHz double-pumped.

<font color=blue>If you don't buy Windows, then the terrorists have already won!</font color=blue> - Microsoft
March 26, 2002 9:45:10 PM

well that is sorta happening.
the bandwidth of rdram is currently 16bits, and soon(ish) its being widened to 32bits.
dont ask me how

Morally destitute, Emotionally bankrupt but a proud and respected member of Toms Forums! :smile:
March 26, 2002 10:40:50 PM

It's like this. Now:

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Later:
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<font color=blue>If you don't buy Windows, then the terrorists have already won!</font color=blue> - Microsoft
Anonymous
a b } Memory
March 27, 2002 1:42:49 PM

thanks,
its now becoming clearer. however ive gota nother question (maybe stupid)
how does a 32 bit CPU process 64 bits of data at a time??
March 27, 2002 8:57:08 PM

Bum you are right except for the latency numbers - SDR and DDR DIMMs both have <b>lower</b> total latency than RDRAM RIMMs - this has been discussed ad nauseum and proven many times over.

I thought a thought, but the thought I thought wasn't the thought I thought I had thought.
!