3200 cas2.5 vs 3000 cas2

[265115]

Im still trying to learn everything I can about memory, so anything I say doesn't mean its fact, just what I understand so far. Now its been said that 3000 cas2 memory is faster than 3200 cas2.5 memory. If I understand this correctly, 3000 cas2 has a bandwidth of 3GB/sec and the cas2 means that the it takes 2ms for the ram to recognize the initial burst of data. 3200 cas2.5 has a bandwidth of 3.2GB/sec and 2.5ms to recognize the initial burst of data. I know the bandwidth is theoretical and it never reaches 3GB/3.2GB, but rather just under. How does the 3000 ram gain more performance over .5ms, when 3200 ram has 200MB more bandwidth? Wouldn't this also depend on how ram intensive certain applications are?

 

[8235k8hta]

CAS

a memory function, acronym for Column Address Select. A control pin on a DRAM used to latch and activate a column address. the column selected on a DRAM is determined by the data present at hte address pins when CAS becomes active. often heard as CAS before RAS, or adress the column before you address the row in a memory matrix.

 

[8235k8hta]

if your application needs are under 3GB bandwith, the 3000 CAS2 is faster.

 

[Cruiser]

The PC3200 CAS 2.5 is faster! Sure there´s a slight difference between CAS 2.0 and 2.5, but the 0.2GB more bandwith makes the CAS 2.5 run faster anyways!

 

[8235k8hta]

nope. the slight difference is the .2 GB bandwith!
CAS2 increase is faster upon .2GB bandwith increase for a 3GB bandwith memory.

in one word, what is the bandwith need for the application? fulltime 3.2GB?

whatsover no matter. you can overclock the bus to 225Mhz with the Abit KX7-333R which transforms your DDR333 to DRR450 thus with a bandwith of 3.6GB! hehe.

 

[8235k8hta]

sorry, i didn't see before your theoretical latency values. roflmao.


ps: are you sure your memory is as fast as your hard disk?

 

[FatBurger]

Column Access Strobe

<font color=blue>Hi mom!</font color=blue>

 

[Guest]

Column Access Strobe
is a signal sent to a dynamic random access memory (DRAM) that tells it that an associated address is column address. a data bit in DRAM is stored in a cell located by the intersection of a column address and a row address. a RAS (Row Address Strobe or Select) signal is used to validate the row address.

stuppug.


if you know you don't know, the way could be more easy ...