RD-RAM & AMD?

[Hoolio]

Could AMD use RD-RAM to power one of their future processors or the current athlon processor?

Would it give AMD any performance advantage?

I have heard that current parrallel DDR-Ram cannot last for too much longer, when are we going to see some exciting changes in the memory field, RDRAm is kinda exciting in some sad way.

Your turn.......

 

[Guest]

May 28, 2002

<b>Samsung Develops Prototype DDR-II SDRAM</b>

Samsung Semiconductor, Inc. on Tuesday announced the industry's first DDR-II device, a high-density 512-Mbit DDR-II SDRAM, that it expects to be the next-generation mainstream DRAM technology for high-speed systems.
DDR-II represents the next-generation of DDR DRAM, a redesign that is seen as necessary as DDR-I runs out of steam. Some DRAM companies, such as Micron, are considering manufacturing a DDR-400 chip, but others consider DDR-400 an unnecessary speed grade that will simply slow the transition to DDR-II.


Samsung's 512Mb DDR-II SDRAM fully satisfies the JEDEC DDR-II standard set in March 2002, according to Samsung. The device can transfer data at rates up to 533 Mbit/s that can be extended to a maximum of 667 Mbits/s for networks and special system environments.

IBM helped with the design work, according to Samsung.

"Samsung will continue to aggressively support the DDR-II design as a future mainstream technology to satisfy customer needs for high-density, high-performance memory," said Tom Quinn, vice president of marketing for Samsung Semiconductor, Inc., in a statement. "The verification project on DDR-II has greatly reduced the lead time for introducing this new design as a next-generation solution. The board-level evaluation stands as concrete evidence to the reliability of the technology."

Samsung will commence volume production of the new 512-Mbit DDR-II SDRAM devices in the third quarter of 2003, the company said.

from <A HREF="http://www.extremetech.com/article2/0,3973,34543,00.asp?kc=ETNKT0107KTX1K0000361" target="_new">extremetech</A>.

<b>Samsung speeds ramp of 512-Mbit DDR-II chips after evaluations with IBM
Semiconductor Business News</b>
(05/28/02 07:35 a.m. EST)

SEOUL -- Samsung Electronics Co. Ltd. today announced plans to begin volume production of 512-megabit DDR-II synchronous DRAMs in the third quarter this year after successfully completing system-level evaluation on prototype 128-Mbit DDR-II devices with IBM Corp.

In making its announcement, Samsung claimed it was the first memory maker to formally introduce 512-Mbit SDRAMs conforming to the industry's new double-data rate II (DDR-II) specification. The 1.8-volt 512-Mbit DDR-II memory offers 533-megabit-per-second data transfer rates and is housed in a chip-scale, ball-grid array (BGA) package with 60 ball contacts, the Korean chip maker said.

The 512-Mbit DDR-II SDRAM's data rate can be extended to a maximum of 667-Mbit/sec. for networks and special system environments, according to Samsung.

The company said its new device incorporates JEDEC's DDR-II specifications by adding core functions that include: off-chip driver calibration (OCD) to maintain optimum driver strength; on-die termination (ODT) to ensure optimum signal waveform; and posted CAS, a command control method to enhance bus efficiency. Samsung said its 512-Mbit DDR-II SDRAM fully complies with JEDEC DDR-II standard, which was finalized in March.

"Samsung will continue to aggressively support the DDR-II design as a future mainstream technology to satisfy customer needs for high-density, high-performance memory," promised Tom Quinn, vice president of marketing for Samsung Semiconductor Inc. in San Jose.

He said Samsung's joint verification project with IBM "greatly reduced the lead time for introducing this new design as a next-generation solution."

In March 2001--prior to the development of the 512-Mbit DDR-II SDRAM--Samsung created a 2.5-volt, 128-Mbit DDR-II prototype for the joint evaluation project with IBM. In parallel with that effort, IBM created a first-generation DDR-II memory interface chip with a new registered dual-inline memory module (DIMM) for the new double-data rate II spec.

Samsung said the DDR segment is expected to represent 40% of DRAM sales in 2002 and will reach 66% by 2003. The DRAM market is expected to reach $21.1 billion in 2002 and grow to $41.1 million by 2004, said Samsung, citing a forecast from Dataquest Inc.

from <A HREF="http://www.siliconstrategies.com/markets/computers/OEG20020528S0005" target="_new">Silicon Strategies</A>

Sunday, June 30, 2002

<b>JEDEC solidifies DDR-II specification</b>
By Jack Robertson
EBN
(06/25/01, 09:26:28 PM EST)


JEDEC announced Monday that the industry standards body had approved the preliminary spec for the next generation DDR-II memory chip, which is expected to be in production in 2003.

A panel of 120 companies approved the spec at a recent meeting in Tokyo. JEDEC officials said initial samples of the DDR-II chip should be available in 2002, with production coming nine to 18 months later. DDR-II is expected to be lower voltage at 1.8V, with speeds up to 533MHz. The chip is also expected to be optimized as memory for both PC and handheld devices.

As part of the preliminary spec, JEDEC approved 400 and 533MHz DDR chips. Comparable DDR memory modules would carry the PC3200 nomenclature for a 3.2Gbyte/s bandwidth using the 400MHz chip, and PC4300, with a bandwidth of 4.3GBytes/s for the 533MHz chip.

<b>JEDEC officials said the memory panel will now turn its attention to a DDR-III specification for a chip to follow in the 2004 to 2005 time period. Sources said DDR-III could be combined with the work of the Advanced DRAM Technology industry group, which includes Intel Corp. and a number of leading memory makers.</b>

from <A HREF="http://www.ebnonline.com/digest/story/OEG20010625S0104" target="_new">EBN Online</A>

<i>if you know you don't know, the way could be more easy ...</i>

 

[Hoolio]

cool thx for the info

 

[Quetzacoatl]

AMD doesn't even have the need for RDR currently. For the Hammer, they have DDR or DC DDR slated, which provides more than enough bandwidth. RDR was originally developed for the pentium 4 to provide the high memory requirement that DDR or SDR couldn't offer (without DC).

"When there's a will, there's a way."

 

[bum_jcrules]

I wonder what the DDR-III standard will be.

I understand DDR-II, but I have no clue about III. There is not even a single paper posted about it yet. Must still be in committee.

Any ideas?

<b>"Sometimes you can't hear me because I'm talking in parenthesis" - Steven Wright</b> :lol:

 

[bum_jcrules]

Here are the key pholosophies for the DDR-II standard stated in the paper by Joe Macri of ATI titled "DDR II - The Evolution Continues" of the JEDEC Future Dram Task Group.

• Evolution NOT Revolution
• The system is more important than the Dram
• Low cost
• Low power
• Simplify Dram
• Parallel control architecture offers lowest inherent latency
• DDR I backwards compatibility
• Improve bus utilization - More efficient Dram
• No custom Dram interface required on memory controller
• Compatible with industry standard place/route tools
• User flexibility
• Invent only what is necessary - Borrow from Srams, SLDram, etc.

So here it states that it will take something from SRAMs and SLDRAMs but I don't think this is the EDDR using SRAM in the rows. Could it be something else? DDRII SRAM and QDRII SRAM specifications were approved on March 20, 2002. So what in the world is DDR-III?

Back to you...

<b>"Sometimes you can't hear me because I'm talking in parenthesis" - Steven Wright</b> :lol:

 

[Guest]

<b>Jedec Announces Completion Of Preliminary Spec For DDR II Memory And Starts Work On DDR III</b>

6/27/01-
As DDR ramps into volume in the marketplace JEDEC continues to enable continuous growth in the memory industry with completion of second generation DDR and the start of development on 3rd generation DDR.

Arlington, VA-- JEDEC today announced the completion of the preliminary specification for second generation DDR SDRAM, known as DDR II. At the June memory committee meeting in Tokyo, work was completed on the preliminary specifications for the device and module. There are more than 120 companies on the committee working on the standard including DRAM industry leaders Elpida, Hynix, IBM Microelectronics, Infineon, Micron, Mitsubishi, Mosel Vitelic, Samsung, Toshiba, as well as chipset and infrastructure leaders AMD, ALi, CST, ServerWorks, VIA, Texas Instruments, and others. With another doubling in bandwidth, optimized bus utilization, and improved power management, DDR II will provide significant performance improvements just in time to meet the demands of a wide range of future applications from PC’s, laptops, cell phones, and PDA’s, to communications, gaming, servers, and workstations similar to DDR today. Early samples of DDR II should be available in 2002 with production volumes typically following 9-18 months later. Check with your memory supplier for details.

As the work on DDR II was wrapping up, the committee initiated development work on the generation of memory that will follow DDR II, currently referred to as DDR III. Targeted to satisfy the next level of system demands, the committee will be focusing on application needs and technology advancements to define the best DRAM solution for generations well into the future.


As with all previous generations of JEDEC Standard memory, DDR II is sufficiently backwards compatible to allow controllers to support both it and the previous generation for maximum adaptability and reuse of existing infrastructure. With initial specifications set for DDR 400 (PC 3200, 3.2Gbyte/sec) and DDR 533 (PC 4300, 4.3Gbyte/sec), DDR II Devices (Modules) will have the headroom to expand and meet the requirements of the industry.

About JEDEC

JEDEC, the leading developer of standards for the solid-state industry, is a sector of the Electronic Industries Alliance (EIA). EIA is the trade association that represents manufacturers in all areas of electronics.


Almost 1800 representatives appointed by some 275 JEDEC member companies work together in nearly 50 JEDEC committees to create these standards plus additional engineering and technical publications. JEDEC seeks to promote the universal acceptance of these publications and standards, which are intended to meet the needs of every segment of the industry and its customers.

All JEDEC standards are available free online at www.jedec.org.


Contact: Ken McGhee
JEDEC
703-907-7558
kenm@eia.org

EDITORS: Please note that information regarding the JEDEC Solid State Technology Association is available via JEDEC’s World Wide Web Site at htt


by: AMI2
© Copyright 2001

from <A HREF="http://www.ami2.com/shownews.asp?num=991" target="_new">AMI2/JEDEC</A>


<i>if you know you don't know, the way could be more easy ...</i>

 

[bum_jcrules]

"As the work on DDR II was wrapping up, the committee initiated development work on the generation of memory that will follow DDR II, currently referred to as DDR III. Targeted to satisfy the next level of system demands, the committee will be focusing on application needs and technology advancements to define the best DRAM solution for generations well into the future."

And this means........what?

Would you quess maybe frequency increases or packaging changes? That article is a year old. DDRIII cannot be DDRII SRAM. So it is not a structural/architectural change of that nature. So I pose the question again...

What is DDRIII?

<b>"Sometimes you can't hear me because I'm talking in parenthesis" - Steven Wright</b> :lol:

 

[Guest]

Here are the key pholosophies for the DDR-II standard stated in the paper by Joe Macri of ATI titled "DDR II - The Evolution Continues" of the JEDEC Future Dram Task Group.

• Evolution NOT Revolution
• The system is more important than the Dram
• Low cost
• Low power
• Simplify Dram
• Parallel control architecture offers lowest inherent latency
• DDR I backwards compatibility
• Improve bus utilization - More efficient Dram
• No custom Dram interface required on memory controller
• Compatible with industry standard place/route tools
• User flexibility
• Invent only what is necessary - Borrow from Srams, SLDram, etc.

Plus
- Performance/Bandwith Improvements
- Cost Improvements
- Power Reduction Improvements
- I/O, Package and Clocking


<i>if you know you don't know, the way could be more easy ...</i>

 

[eden]

I think they are over exaggerating the DDR naming. DDR was used to say twice the speed, now it has become non-original with DDR II and III, it's kind of like a game serie. They have to change names, to something like QDR as intended.

Even after reading all this I am not getting DDR II's advantages, it's all too mixed!!

--
Intel and AMD sitting under a tree, P-R-O-C-E-S-S-I-N-G!

 

[papasmurf]

amd would gain nothing using rdram. dual channel ddr is soon on the way and the only reason that the p4 is so fast with rd ram is because rambus signed a contract with intel for all those years makeing rdram the only memory to be used with them so intel optimized the p4 for rdram and for nothing else. if intel had optimized their proc for ddr the speed diff would shrink tremendously. ddr has a great future however rdram does not.

Introducing Tapeworms! The new big thing for weight loss!