groth2757

Distinguished
Apr 24, 2002
825
0
18,980
I picked up a Gigabyte GA-7VRXP about 2 months ago. I'm thinking about dropping this board because of the bad things I've heard. I've been reading some reviews of boards with RDRAM and it seems that RDRAM might be staying with us for a while. I know that the RDRAM really unlocks the power of the latest Intel procs. I also built an RDRAM system for a friend a little while back and it screams. I've never seen a DDR system in action. So my question is will there be a big difference using either DDR or RDRAM? Also do you think I should stay with an Athlon XP or go Intel for the proc. I'm using an Intel 1Ghz right now. Any help would be great.

:tongue: <font color=red>I invented the internet and bacon.</font color=red> :tongue:
 

Crashman

Polypheme
Former Staff
RDRAM has significantly better bandwidth (PC1066 at 4.2GB/s, DDR400 at only 3.2GB/s), but higher latency handicaps RDRAM so that the performance improvement is only about 5%.

<font color=blue>At least half of all problems are caused by an insufficient power supply!</font color=blue>
 

bum_jcrules

Distinguished
May 12, 2001
2,186
0
19,780
Crash & community,

What do you think the yields will do with the new layout of PC1066 with the 32-bit PCB and RIMM?

I don't think they will actually change anything because the 32-bit width is the same as the 2 channels only on one module instead of needing two. If both channels are satisfied by one module. How would another memory module help bandwidth? It shouldn't because both channels are being accessed. Unless tey can make each channel 32-bit, but that doesn't look like that is the case.

Rambus says that the 32bit RIMM is 4.2GB/s. That is if you use the 1600/3 MHz x 4 Bytes (see below) x 2 Channels x = 4.264GB/s. However if both channels are being used to equal the 32 bit pathway that would still be 1600/3 x 2 Bytes x 2 Channels = 2133.33GB/s.

(((2bits per cycle (RDRAM is DDR) x 32bit data pathway = 4 Bytes)))

I was wondering what your thoughts were. Have you looked at that before? Or is it now acting like 4 channels? Hummm...

Back to you...

DP

<b>"Sometimes you can't hear me because I'm talking in parenthesis" - Steven Wright</b> :lol:
 

Crashman

Polypheme
Former Staff
PC4200 will be the same chips as PC1066, but on a 32-bit module. The only reason is that with 32-bit modules you will need only one, instead of a pair. If you remember correctly, each pair of RDRAM has been serial to the next pair. So mounting a pair of PC4200 might actually be slower than a single PC4200.

<font color=blue>At least half of all problems are caused by an insufficient power supply!</font color=blue>
 

bum_jcrules

Distinguished
May 12, 2001
2,186
0
19,780
Reguardless of chip layouts, each channel is 16 bit. Correct.?...? This is what I am not positive on.

If each channel is still 16 bit, that means that there shouldn't be any bandwidth increases. The overall transfer size would be 2 bytes per clock cycle. You see, my observation is that if the channels are the same the bandwidth will remain the same and that is not what Rambus is toughting. They are claiming 4200. (12800/3 GB/s to be exact.) If each channel is still 16 bits that cannot be achieved.

Also, if the channels are 32 bit each, then you would need two, 2, modules to achieve maximum bandwidth; 16 bits from each module on the same channel. However I do not think that this is inherent in the current architecture layout.

Back to you...

<b>"Sometimes you can't hear me because I'm talking in parenthesis" - Steven Wright</b> :lol:
 

Crashman

Polypheme
Former Staff
Two channels are parrallel to each other with 16-bit RDRAM on the i850. So that makes the memory path 32-bits wide. 1066 is supposed to represent the MHz of the RDRAM, but I think RDRAM is actually DDR, so that PC1066 is actually 533x2. For simplicity, I'll just say it's 1066MHz. Now, because the bus is 32 bits, 1066x32/8/1024=~4.2GB/s.

The new 32-bit RIMMs are simply a pair of 16-bit RIMMs on one module.

<font color=blue>At least half of all problems are caused by an insufficient power supply!</font color=blue>
 

bum_jcrules

Distinguished
May 12, 2001
2,186
0
19,780
General populous at THGC, Read the white papers and the architectural documents.

The memory does not truly run at 1066Mhz. The effective speed is 1066MHz but it actually runs at 533Mhz with a DDR signal. 2 bits per cycle x 533MHz = effective 1066MHz.

But enough of the semantics…

It is 1600/3 MHz (Clock speed is not 1066MHz)<b><font color=red>*</font color=red></b> <b>(See below)</b>

It is a common misconception. Because RDRAM uses a DDR signal or 2 bits per wave, it creates an effective 3200/3 or 1066 MHz signal.

But enough of the semantics…


Crash,

I was digging through a bunch of technical boring stuff and I still cannot determine if the channel is 16/18 bits wide or if it is 8/9 bits wide with a DDR signal. Well, I cannot tell 100% for sure. It appears that is probably is a 16/18 bit wide channel and has a DDR signal on top of that. So the calculation would be…

Bandwidth = 1600/3 MHz x 2 bits per clock (DDR) x 16 bit Data Pathway (Channel) x 2 Channels

So it is 34133.33 bits per second or 4266.667 Bytes per second or 4.2667 GB/s.

So Rambus isn’t lying about that. However my first assumption is correct. Having a 32 bit RIMM does not increase overall peak theoretical bandwidth. You could use 16 bit PC1066 on an existing motherboard and the bandwidth would be the same. Nothing new except there should be faster speeds due to the termination resistors on the PCB and the fact that you can use both channels with one PCB module.

Based on that, dual cannel DDR400 kills PC1066 and even PC1200 regardless of 16 bit or 32 bit. Until they make the channels 32 bit each and the chips themselves 32 bit RDRAM will lose the bandwidth battle.

Now latency will be the main factor. If DDRII, QDR, and QDRII can keep the latency issues down they will be king. It would be nice if they could get those clock speeds up as well.

What are your thoughts?




<b><font color=red>*</font color=red></b> = See Page 2 (Chart with clock speeds) of the <A HREF="http://www.rambus.com/downloads/rimm_4200_white_paper.pdf" target="_new"><i>Rambus RDRAM® RIMM™ 4200 white paper - By Mike Feibus, Feibus SC -May 2002</i></A> for clock speed of the memory.

For older PC600 and PC800 look here at the 82850 MCH specs.

“RDRAM Interface
The MCH directly supports two channels of Direct RDRAM memory operating in lock-step using RSL
technology. The MCH RDRAM channels run at 300 MHz and 400 MHz and support 128 Mb and
256 Mb technology RDRAM Direct devices.” Taken from the <font color=blue>Intel® 850 Chipset: 82850 Memory Controller Hub (MCH) Datasheet November 2000</font color=blue>

<b>"Sometimes you can't hear me because I'm talking in parenthesis" - Steven Wright</b> :lol:
 

Crashman

Polypheme
Former Staff
Yes, I was fairly certain b4 that it was a DDR bus. Anyway, using a memory multiplier of 4x would indicate 533MHz for RDRAM, which is of course 1600/3. I think people will see slight gains with RIMM 4200 over PC1066 because of lower latency, but dual channel PC2100 will rule both with even less latency. What would the point of dual channel DDR400 be? The ability to use cas latencies of less real time than PC2100 at Cas2? That would make a small difference, but not worth the extra cost of DDR400 over PC2100 IMO. PC2700 is getting to be cheap, in the PC2100 price range, so maybe Dual Channel DDR333 would be the ideal solution for overclockers on a budget, you'd be able to maintain a 1:1 bandwidth ratio while overclocking to 166MHz FSB.

<font color=blue>At least half of all problems are caused by an insufficient power supply!</font color=blue>
 

bum_jcrules

Distinguished
May 12, 2001
2,186
0
19,780
I think going forward, latency issues will be crucial until clock speeds increase. When QDR and QDRII come out, slated sometime end Q3 or in Q4 this year, latency issues will be more important if the clock speeds are the same.

For the reason that DDRSDRAM and RDRAM are hindered by the culmination of the number of latency steps just to execute a read/write with the use of DDR signal; a quad data rate will suffer from increased latency penalties.

I mean in the fact that one missed cycle means 2 bits instead of 1 are delayed and in the case of QDR that is 4 bits per signal that is delayed. (Add additional channels and start multiplying) So at the same clock speeds, QDR will have more potential latency than DDR but will have twice the bandwidth of DDR. So for the price of an increase in the potential overall latency you get twice the bandwidth. Speed of course covers that price somewhat. More clocks per second the smaller the impact of a missed address, etc.


I agree with you under current memory speeds that it would be beneficial to use DDR333/PC2700 while on a budget.

One thought however... Increasing the speed of the memory is more beneficial than that of dropping the timing settings down to the most aggressive levels. (Under current conditions.) Even if you could save 10 cycles of latency, that would be the difference between...

1 - tRC Timing: 3, 4, 5, 6, 7, 8, 9 cycles

2 - tRP Timing: 3, 2, 1, 4 cycles

3 - tRAS Timing: 2, 3, 4, 5, 6, 7, 8, 9 cycles

4 - CAS Latency: 2, 2.5, 3 cycles

5 - tRCD Timing: 1, 2, 3, 4 cycles


of 9-3-5-3-3 setting and a 3-1-2-2-2. That would be 10 cycles. So for 10 cycles that would be 20 bits delayed for a total of 0.000000602 seconds. That over the course of a year, running full time 24-7-365, would be the difference of 1.9 seconds. However if you increase the speed to 200MHz clock with DDR400 the difference and using the DDR333 with the more aggressive settings the difference is 1.58 seconds. Again it is miniscule but the difference in speed is obvious. At 166MHz, with zero latency, there would be 21,200,000,000 bits transferred. At 200MHz, that would be 25,600,000,000 bit transferred. That is 440,000,000 bits via the speed increase and only 20 bits from the timing change. So you see, speed increases are more important than latency settings.

If it is within the budget of the person doing the upgrade, then DDR400 is much better choice, even at bad timing settings, than DDR333 at CL2 vs. CL3. But I totally agree with you that on a budget Dual channel using DDR333 is a very good choice.


Going back to RDRAM...for the THGC...

RDRAM PC1066 using 16 bit RIMMs and 2 modules will yield the same results<font color=red><b>*</font color=red></b> in terms of Peak Bandwidth they are the same. The 4200 RIMM only eliminates the need for two modules. It didn't actually make the channels wider.

...so under 16 bit RIMMs...

1066MHz x 2 Bytes x 2 Channels = 4.2667GB/s using 2 RDRAM modules.

or under 32 bit RIMMs...

1066MHz x 4 Bytes (2x2)= 4.2667 GB/s using one RDRAM module.

<font color=red><b>* =</font color=red></b>Well the 32 bit RIMM with the one module should yield better performance results as Crash mentioned due to the termination resistors on the module and not on the Motherboard, etc. But for Peak Bandwidth, it will not make any difference between the two.

<b>"Sometimes you can't hear me because I'm talking in parenthesis" - Steven Wright</b> :lol:
 

Crashman

Polypheme
Former Staff
It's important to let the newbies know that increasing memory bandwidth beyond CPU bus bandwidth makes no improvement on performance though. That's why they are only seeing very small increases in performance on the KT333 by using PC2700 instead of PC2100, the only improvement the CPU can see is the lower latency do to faster cycle times at the same CAS setting. Getting back to the P4, ANY improvement over current DDR technology would be helpfull, as DDR400 only has the same bandwidth as PC800 and Intel's "QDR400" bus.

<font color=blue>At least half of all problems are caused by an insufficient power supply!</font color=blue>