Memory Bandwidth on Hammers

bum_jcrules

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If anyone would like to know...

Hammer will have an agregate bandwidth through hypertransport of 19.2GB/s to it's own memory and to the memory of any other processor in a multiprocessor setup.

Fast stuff!

<A HREF="http://www.hardforums.com/showthread.php?s=&threadid=440463&perpage=20&pagenumber=2" target="_new">Thread started by cheeta05r over at the Hardforums</A>. Thanks again cheeta...


Or <A HREF="http://www.muropaketti.com/artikkelit/sekalaista/amd_hammer/" target="_new">see here at the site</A> he took the slides from. Very good read. Well, even better to look at.

:smile:

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Oracle

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Mucho interesting!
Now the bottleneck will reside with the RAM module itself and no longer the FSB.
I just hope we'll have QDR800 (or more) modules by that time.


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bum_jcrules

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QDRII with the SRAM Column registers and with the new packaging will definately be nice.

<b>"If I melt dry ice in a bathtub, can I take a bath without getting wet?" - Steven Wright</b>
 

eden

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Yeah it all sounds wow, but the thing is, isn't DDR II just another way of increasing bandwidth further? I mean really, let's face it, we can hype the new RAM type as much as we want, but the end result is 90% by how much bandwidth the thing gives, and if no FSB out there can output this much, I don't see why DDR II is so much hyped about.

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Scotty35

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Just another way MB manufactures can speil a new piece of shite, ultimately it means money on hype!

<A HREF="http://www.btvillarin.com/phpBB/index.php" target="_new">A better place to be</A> :wink:
 

Oracle

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Well, the way I understand it, FSB speed would be irrelevant in the case of Hammer with regards to memory accessibility since it will have on-die memory controller with a dedicated high-bandwidth path (call it HyperTransport or other) to the actual RAM.
So, as BUM said, a 20Gb/s bandwidth or so path to the memory opens the door to the high memory performance expected from DDR-II.


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juin

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DDR 1 timing 2-2-2

DDR 2 timing 5-5-5

I call that a trade off

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bum_jcrules

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<A HREF="http://www.qdrsram.com/news/3_20_02.html" target="_new">JEDEC Approves QDR™II Family of High-Speed SRAM Products</A>

<A HREF="http://www.qdrsram.com/news/6_26_2002.html" target="_new">Samsung Leads Next-Generation Networking with
Industry’s First 36Mb QDR™II SRAM</A>

We talked about DDRII, QDR and QDRII at length before on a thread. (<A HREF="http://forumz.tomshardware.com/hardware/modules.php?name=Forums&file=viewtopic&p=33896#33896" target="_new">Rambus and AMD?</A>

Eden, you were ther for that.

So far the bandwidth for QDR will be about 36GB/s.

<A HREF="http://www.qdrsram.com/datasheets/Samsung/k7i323684m.pdf" target="_new">See here for the data sheets from Samsung</A>.

I looks to be very impressive stuff. (My opinion)

You decide for yourselves.

<b>"If I melt dry ice in a bathtub, can I take a bath without getting wet?" - Steven Wright</b>
 

bum_jcrules

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Juin,

Where are you getting your numbers from?

<A HREF="http://www.samsungusa.com/cgi-bin/nabc/semiconductors/search/datasheet.jsp?family=537" target="_new">Try looking here for some up to date info...</A>


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Oracle

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All that stuff is pretty nice, but mass production might not be just around the corner.


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bum_jcrules

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Already is. Engineering samples have been available for a long time now.

<A HREF="http://www.qdrsram.com/news/4_15_02.html" target="_new">NEC Electronics Ships QDRII/DDRII Family of High-Speed SRAM Products - 4-15-2002</A>

"NEC is proud to be one of a handful of vendors currently shipping this leading-edge memory technology."

Vendors are:

1. Cypress
2. Hitachi
3. IDT
4. Micron
5. NEC
6. Samsung

Anyone here you wouldn't want to buy from?

<b>"If I melt dry ice in a bathtub, can I take a bath without getting wet?" - Steven Wright</b>
 

bum_jcrules

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Here is another thing that is interesting abut QDRII or QDR SRAM.

<A HREF="http://www.qdrsram.com/news/7_15_2002.htm" target="_new">NPF LA-1 Interface Specification Compatible with QDR SRAM</A>

“QDR’s adoption, innovation, and market growth continues to make the QDR SRAM family of products the high performance memory of choice in the networking market. We feel this standard will be beneficial to both our networking customers and integrators,” said Mario Martinez, director of Strategic Marketing for Cypress’s Memory Products Division.

Now the Networking Processing Forum(NPD) adopted QDR SRAMs.

Very interesting.

<b>"If I melt dry ice in a bathtub, can I take a bath without getting wet?" - Steven Wright</b>
 

eden

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Yeah but I had given up on the thread, I was there late and it was much long.

My point is, it's all nice and big numbers, but who's to say we will use it now! I mean if DDR II only provides bandwidth but in games, it won't boost by even 10% even if the FSB is bottlenecking, then I see no point than just to ensure the future which seems far from now, to use DDR II bandwidth.



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bum_jcrules

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Did you read the post above this one?

As you can see it has been adopted as the go-to solution for future networking applications. The 36GB/s bandwidth is a very nice fit.

"if DDR II only provides bandwidth but in games, it won't boost by even 10% even if the FSB is bottlenecking, then I see no point than just to ensure the future which seems far from now, to use DDR II bandwidth."

That future is now. They are already shipping product.

Q:Who would be buying it?

A:producers of end user products.

<b>"If I melt dry ice in a bathtub, can I take a bath without getting wet?" - Steven Wright</b>
 
G

Guest

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The pentium 4's seem to love all the bandwidth they can get. It would be interesting to throw something like that in with one of those to find out if/where there is a limit.

Who wants to bet that the next gen AMD's will be capable of utilizing a much bigger memory bandwidth than current memory can offer?
 

eden

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Wait a minute, DDR II is QDR?

Yes they are shipping but that still won't make sales any stronger if there are no current performance benefits on CURRENT desktop systems.

To knewton, maybe P4s would benefit, but you would want their bus to be ready as well. I mean if you want to use 10GB/sec, you need a big 1.25GHZ bus!

Also I dunno but I think we are not on the same page here. Unless you are reading off the SRAM QDR, and I am thinking DDR II, I am being mixed here!
All I want to know, is what is the point of coming out with DDR II, when all it does is up the bandwidth considerably, if current systems will not use it until a good while? What is the FIRST bandwidth offered by the lowest model for that matter?

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bum_jcrules

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Eden,

Sorry I went on ahead. Let me come back to the DDRII standard. The DRAM memory types will be the form FPBGA, higher clock speeds, and lower voltages. That is all DDRII really is.

DDR as you know is Double Data Rate.

QDR is Quad Data Rate.

QDR is 4 bits per signal cycle where DDR is 2 per signal cycle.

However: The next round of memory parallel types will take the form of DDRII (SDRAM, FCDRAM, RLDRAM), DDRII VCSDRAM, DDRII SRAM, QDR SRAM, and QDRII SRAM.

The latter three are the lowest latency forms of parallel memory types.(To date.) DDR SRAMs and QDR SRAMs are in production and the others are in engineering forms. However the production of the others are slated for this quarter.

I bring up the SRAM side because this is being shipped to end user product manufacturers.

Network applications, video applications, etc. With 36Gb/s of bandwidth imagine the improvements that can take place. This is only the surface.



Juin,

You are correct. I should have posted <A HREF="http://www.samsungusa.com/cgi-bin/nabc/semiconductors/search/datasheet.jsp?family=554" target="_new">this for you</A>. However those are only showing engineering samples available in November. Also that is only Samsung.

Either way..."Where are you getting your numbers from?"

Why would the latency settings increase?

Everything out there points to lower latencies, lower voltages, smaller packaging, and higher speeds as the next round of technology comes out.

I mean even Micron and Infineon are building low latency versions of DDRI and DDRII. It is called ELDRAM.(Reduced Latency DRAM) Get the <A HREF="http://www.rldram.com/datasheets/index.html" target="_new">data sheets here</A>. Toshiba and Fujitsu call it FCRAM.(Fast Cycle DRAM) Get the <A HREF="http://www.fme.fujitsu.com/products/fcram_new/consumer.html" target="_new">sheets here from Toshiba</A> or read <A HREF="http://www.toshiba.com/taec/components/Generic/WP_memory.shtml" target="_new">this to understand what they are doing by looking here</A>. If memory makers use the SRAM column registers for <A HREF="http://www.lostcircuits.com/memory/eddr/" target="_new">EDDR DRAM</A> and EDDRII DRAM, that means that a CAS latency of zero cycles. (CL0) The memory will have the row strobe and the column will have its info static, a.k.a. No latency penalty.

So why would you state 5-5-5. Which settings are those anyway?

SDRAM Idle Limit: 0, 8, 12, 16, 24, 32, 48 cycles
tRC Timing: 3, 4, 5, 6, 7, 8, 9 cycles
tRP Timing: 3, 2, 1, 4 cycles
tRAS Timing: 2, 3, 4, 5, 6, 7, 8, 9 cycles
CAS Latency: 2.5, 3 cycles
tRCD Timing: 1, 2, 3, 4 cycles

Only two have settings for 5 cycles...tRAS and tRC.("tRAS" the minimum page open time and "tRC" the bank cycle time.) And as I posted above there are a lot of improvements already started and some are scheduled for mass production this quarter.


<b>"If I melt dry ice in a bathtub, can I take a bath without getting wet?" - Steven Wright</b>
 
G

Guest

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Sorry eh, forgot to answer until i read it today.

If you believe like I do that Processor manufacturers would gladly keep bumping FSB capabilities, and the ability of their processors to benefit from it, to reap the rewards of speed improvements of newfound memory types, then there isn't any question left in your mind. I mean, why wouldn't they?
 

eden

Champion
Yeah, but they would have to tinker a lot into multipliers, also the added FSB may not even be needed at the time. I very much doubt even the hungry-for-bandwidth P4 would benefit from twice the FSB ,the current NW Bs have, at 2.53GHZ. While it all sounds nice, it's so early in fact, even AGP 8X sounds closer than this novelty.

Although Bum's talk about SRAM uses for digital stuff sounds quite interesting.

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G

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The P4 may not benefit all that much since it's now such an old design, and maybe we are sseeing almost all it can do. I was thinking more specifically of the hammer. We'll have to wait and see, but I think this will be one of the new "features". I think there are many clues that point to this.
 

juin

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wait for the retail version
Lower lantency dont mean faster internal timing.

Also all this QDR 2 or version 17827 will allwayse run in major trouble

Super production cost,small capacity,low effectives and......This will never get to desktop

The day i meet a goth queen that tell me Intel suck.I turn in a lemming to fill is need in hardware.
 

flamethrower205

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That's why there's people like me to support it:) I dun care about the price- if it I like it, I'll buy it. Paid 1 grand for my DDR when it came out.

My frog asked me for a straw...dunno what happened his ass all over the place :eek:
 

chuck232

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But I don't think too many people like the idea of jumping all over new technology and paying up 1G for it...

<i>Past mistakes may make you look stupid, but avoiding future ones will make you look smart!</i>