Basically it shows what happens during a memory copy using a three step processing technique.
Basically they show how to get an aggregate 1720MB/s across their 2133MB/s bus. I thought that it would be worth sharing the steps that they take to increase performance across a limited bus.
Back to you...
<b>"If I melt dry ice in a bathtub, can I take a bath without getting wet?" - Steven Wright</b>
One thing I wonder is, why does Sandra not even max out the bandwidth tests results? Look at the P4 at 400MHZ FSB and mem, it never even got 3200MB/sec in Sandra. Makes you wonder if it's ever using its bandwidth to the max!
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And now, an advice from your friendly Nike shoes slogan: JUST DO HER!
Theoretical vs. actual. The bandwidth is needed. There was an article in IEEE spectrum, a while ago that show why some experts are saying that if ddr2 doesn't come soon it will be useless as processor demand for bandwidth is greater then ddr2 offers (within a year now). Bandwidth should grow with speed, but it hasn't. It is lagging behind. A benchmark may show that the processor doesn't use all the bandwidth because that is a theoretical limit not observable. If a processor is that close to its limit then it will benefit from more bandwidth.
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