Optimizing Memory Bandwidth...

[bum_jcrules]

I thought that this might be worth sharing.

<A HREF="http://cdrom.amd.com/devconn/events/AMD_block_prefetch_paper.pdf" target="_new">Text format in PDF.</A>

and...

<A HREF="http://cdrom.amd.com/devconn/events/gdc_2002_amd.pdf" target="_new">Slide format in PDF.</A>

<b>"If I melt dry ice in a bathtub, can I take a bath without getting wet?" - Steven Wright</b>

 

[lhgpoobaa]

All looks like greek to me...

<b>Due to Customer Complaints, this sig has been witdrawn from public use. Thankyou. :lol: </b>

 

[camieabz]

Yup me too.

I understand the theory, but not the application.

<b><font color=blue>~ Gotta question? Tried searching the boards first? Good! Ask away! ~<font color=blue></b>

 

[bum_jcrules]

Thank you for the vote of confidence you two.

Basically it shows what happens during a memory copy using a three step processing technique.

Basically they show how to get an aggregate 1720MB/s across their 2133MB/s bus. I thought that it would be worth sharing the steps that they take to increase performance across a limited bus.

Back to you...

<b>"If I melt dry ice in a bathtub, can I take a bath without getting wet?" - Steven Wright</b>

 

[eden]

One thing I wonder is, why does Sandra not even max out the bandwidth tests results? Look at the P4 at 400MHZ FSB and mem, it never even got 3200MB/sec in Sandra. Makes you wonder if it's ever using its bandwidth to the max!

--
And now, an advice from your friendly Nike shoes slogan: JUST DO HER!

 

[phsstpok]

Do you actually program in assembler or just fantasize about it?

<b>I have so many cookies I now have a FAT problem!</b><P ID="edit"><FONT SIZE=-1><EM>Edited by phsstpok on 08/23/02 10:12 PM.</EM></FONT></P>

 

[utcomputerboy]

Theoretical vs. actual. The bandwidth is needed. There was an article in IEEE spectrum, a while ago that show why some experts are saying that if ddr2 doesn't come soon it will be useless as processor demand for bandwidth is greater then ddr2 offers (within a year now). Bandwidth should grow with speed, but it hasn't. It is lagging behind. A benchmark may show that the processor doesn't use all the bandwidth because that is a theoretical limit not observable. If a processor is that close to its limit then it will benefit from more bandwidth.