DDR memory 2700, 2400, 2100 etc

[NBM]

is there any real difference between ddr ram pc2700 and pc2400 and pc2100 etc? if so what? and what applications would you notice a difference? Thanks

 

[knowan]

PC 2100 to 2700 there is about a 5% difference BUT you also have to look at the CL. Between CL2 and CL2.5 there is about a 5% difference, so PC2100 CL2 is about the same speed as PC2700 CL2.5.

You want PC2700 CL2 ideally.

I wouldn't touch PC2400 with a ten foot pole as it is a non-standard spec and is probably just overclocked cheep pc2100 with a high CL.

--------------
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[HammerBot]

PC 2100 to 2700 there is about a 5% difference

What makes you say that? PC2700 runs at about 25% higher clock than PC2100 and hence has 25% higher bandwidth. PC2700 at CL2.5 is much better than PC2100 at CL2.

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[juin]

on 3D rendering CAD ir better having low cas that higher bandwith look at SPEC viewperf even if that a very old benchmark that need refresh.Good thing at lease SPEC CPU will be update in 2003

Now what to do??

 

[HammerBot]

Comparing PC2100 CL2 and PC2700 CL2.5, PC2700 is still better. Everybody seem to be so concerned about 2 vs. 2.5 that they forget to consider the clockfrequency. PC2100 runs 133MHz. Hence a latency of 2 CLOCKCYCLES is the same as 15 ns. PC2700 runs 166MHz. Hence a latency of 2.5 clockcylces is also 15 ns.
So, PC2700 CL2.5 has the same effective latency as PC2100 CL2.5 and it has also much larger bandwidth. So PC2700 is definetly the better performer.

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[phial]

true, but in real world circumstances you will probably only see about a 5-10% performance increase. yes the bandwidth is much higher, but your CPU doesnt use this extra bandwidth all of the time.

my friend went from pc2100 CL3 to pc2700 CL2 and he only seen a 10% performance increase. he was using an athlonXP 1800+

and the CL does make as much of a diff as people are saying.. for example...

my old Duron 1.3gig ran faster on PC100 ram at CL2 than it did at 133 with a CL of 3. i ran numerous benchmarks over a few months and the results were always the same, even over different operating systems

 

[HammerBot]

but your CPU doesnt use this extra bandwidth all of the time.

This really depends on the application. If you simply browse the net or use Word, the momory isn't used much. But the important thing to remember is that you don't want you memory to be the bottleneck for memory hungry programs. All benchmark shows that the P4 performs best with high memory bandwidth.

my friend went from pc2100 CL3 to pc2700 CL2 and he only seen a 10% performance increase. he was using an athlonXP 1800+

Only 10%. IMHO 10% is worth it. Especiallt when using an athlon. The bottleneck for the athlon is not the memory badnwidth but the FSB. This is also the reason why there is close to no advantage of using DDR400 memory with an athlon.


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[bum_jcrules]

Phial,

You shouldn't make statements like those without giving the specifics of each case.

With this one...

"my friend went from pc2100 CL3 to pc2700 CL2 and he only seen a 10% performance increase. he was using an athlonXP 1800+"

Athlons cannot utilize the excess speed over 400/3 or 133.33MHz. The FSB signal is only 133Mhz so anything over that will be bottlenecked by the FSB. (Unless you can overclock it to 166.667 or 500/3 MHz.) So on his system he did get a good performance gain. If the FSB were faster he would have gotten more.


And with the...

"my old Duron 1.3gig ran faster on PC100 ram at CL2 than it did at 133 with a CL of 3. i ran numerous benchmarks over a few months and the results were always the same, even over different operating systems"

...statement.

1. Who made each of the memory modules? PCBs between memory manufactures can and normally does impact the performance of the memory and thus the system.

2. What are the densities of the memory types you used? Larger density chips take longer to read. So if you went from 32MB of PC100 to 512MB of PC133 there will be a need for more access time to go through all of the memory to hit the right cell that contains the information the CPU is looking to read. The circuit is long and takes a longer amount of time to go through it.

3. What motherboard and chipset was that machine running? I have a Celeron 333 with a 440LX chipset. It has a 66MHz or 200/3 MHz system clock and FSB. I had a 32MB PC66 stick in there and then replaced it with a Samsung 256MB PC133 module. It does not run much faster. The OS is happier because the HDD is not thrashing as much. But overall the system is not much faster on its own. The memory is still running at 66MHz. That is as fast as the Clock Generator will make it operate.


So like I said, you shouldn't make blanket statements without backing them up. All you do by saying things like that is confuse people. I am not saying this slam you, but to help the THGC to be a better place. The more people know and the more people share the better this place will be.







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[HammerBot]

So if you went from 32MB of PC100 to 512MB of PC133 there will be a need for more access time to go through all of the memory to hit the right cell that contains the information the CPU is looking to read.

I can't believe you just made that statement. This is just so untrue. The only thing that may hamper performance with larger memory capacities is the number of banks used. In some situations this will add a little to the latency but not to the bandwidth. The memory controller does NOT 'go through all of the memory to hit the right cell'. It always nows the exact address to access. PC memory is NOT CAM memory!!!

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[bum_jcrules]

"The only thing that may hamper performance with larger memory capacities is the number of banks used. In some situations this will add a little to the latency but not to the bandwidth."

Banks... yes for sure. Circuit length...yes. The terminators are farther away. (Especially for serial memory like RDRAM...but this is SDRAM so I will stay away from RDRAM.) The longer the circiut the longer the strobe time "needs" to be. Can most operate in the same timeframe...yes. However it still is a factor. And when going from a small density setting to a larger setting the memory knows where it is but it still needs to remember where it is. That matrix is larger also. Is this a huge factor... no, but when you add them all up they add up to be something more substantial.

I never stated that it would impact bandwidth. That is the datapath size x the signal speed x the number odf pathways.

PC2700 = 8Bytes x 500/3 MHz x 2 (DDR Signal) = 2666.667MB/s

PC100 = 8Bytes x 100 MHz x 1 (SDR Signal) = 800MB/s

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[HammerBot]

The longer the circiut the longer the strobe time "needs" to be

DDR RAM is SYNCHRONEOUS. It's not strobed like asynchroneous memory. And even if it was the strobe doesn't need to be longer just because the RAM is further away. The signal travels with the speed of light for crying out loud. Further, the strobe width is not affected by the propagation delay. The width of the strobe is the same in either end of the signal trace.

And when going from a small density setting to a larger setting the memory knows where it is but it still needs to remember where it is. That matrix is larger also. Is this a huge factor... no, but when you add them all up they add up to be something more substantial.

This is just pure gibberish.
I just happened to have designed a memory controller for DDR memory and I know how it works. So don't give me this crap.

<i>Edit:</i>
To quote one of your previous statements:

So like I said, you shouldn't make blanket statements without backing them up. All you do by saying things like that is confuse people.

I would like you to backup your statements and don't confuse people!

<i><b>Engineering is the fine art of making what you want from things you can get</b></i>
<A HREF="http://www.btvillarin.com/phpBB/viewtopic.php?t=655" target="_new">My systems</A><P ID="edit"><FONT SIZE=-1><EM>Edited by HammerBot on 12/03/02 09:12 PM.</EM></FONT></P>

 

[bum_jcrules]

Hammer,

<A HREF="http://www.dewassoc.com/performance/memory/memory_latency.htm" target="_new">"Address decoding latency - Much of this delay comes from the timing signals needed to drive RAS and CAS. Any excess in the signal spacing (time between signals) adds directly to the delay, therefore it is critical to time these inputs precisely to obtain maximum performance. Some designs do not multiplex the addresses in order to eliminate this constraint, requiring extra package pins, and hence increased area."</A>


What kind of logic arrays did you use in your project?

<A HREF="http://www.optimagic.com/faq.html#CPLD" target="_new">"In some architectures, when the number of product terms required exceeds the number available in the macrocell, additional product terms are borrowed from an adjoining macrocell. This makes the CPLD device useful for a wider variety of applications. When borrowing product terms from an adjoining macrocell, that macrocell may no longer be useful. In some architectures, the macrocell still has some basic functionality. Borrowed product terms usually means increased propagation delay."</A>

Or FPGA and FPBGA?

Reguardless of which type...

Any added distance to a circuit will increase the length of time to complete that circuit? Yes. We are talking miniscule lengths time. (nanoseconds)




This is a sub argument... I am sorry I ever brought it up. I don't want to argue with you.

(Why did you bring up synchronous and asynchronous? We are talking about SDRAM and not FP or EDO. <A HREF="http://www.lostcircuits.com/memory/eddr/4.shtml" target="_new">CAS and RAS...? Are these not strobes?</A>)

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[HammerBot]

CAS and RAS are as the name implies Column and Row Address Strobes. However, these names are a reminiscence from the time where DRAM was asynchroneous (not clocked). In this case, the CAS and RAS signals are truly asynchroneous and propagation delay is important at high speeds. However, this has never really been a problem unless the controller is implemented in a eg. CPLD based on an equally slow technology. This is what is discussed in the articles you refer to, but it does not apply to SDRAM (<i>Synchroneous Dynamic</i> RAM).
As memory technologies became faster, it became increasingly difficult to meet the timing requirements of asynchronous memory. Therefore a synchroneous (clocked) layer was put around the memory array. Now, the controller and memory could be clocked with same clock and CAS and RAS only needed to meet the synchroneous setup and hold times. So you see, variations in propagation delay has no influence since the signals are sampled at the clock in the RAM. CAS and RAS are no longer asynchroneous signals, even their function arent exactly the same anymore, but the name stuck.

The controller I made was designed for an ASIC. CPLDs or FPGAs just weren't fast enough.

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[juin]

Especially for serial memory like RDRAM...but this is SDRAM so I will stay away from RDRAM

IN the chip that not very far away i say (RIMM 4200/3200)

Now what to do??

 

[juin]

but chipset give better timing on Pc 2100

Now what to do??

 

[lhgpoobaa]

I find this thread amusing.
People talk about whats better than whatever else, but fail to realise/comment that

THE PERFORMANCE LEVEL OF RAM IS CHIPSET DEPENDENT.

In a strictly theoretical sense PC2700 cas2.5 is somewhat better than PC2100 Cas2. PC2700 cas2 is 25% better than PC2100 cas2.

Include the chipset however and things change.

P4 chipsets like Raw bandwidth above all else.
The faster ram you can run the better.
AMD chipsets, especially those running asynchronously KT133, KT333, KT400, Nforce2, prefer the memory timings to be as hard as possible.




<b>Just because someone's a member of an ethnic minority doesn't mean they're not a nasty small-minded little jerk. <i>Terry Pratchett</i></b>

 

[phial]

roofles

everyone thinks they know more than the other person

i was using a k7s5a mobo, sis 735 chipset...

i believe the ram was samsung, not sure, dont care. just because you read a few techinical terms and understood it doesnt mean the other person doesnt know what theyre talking about

this isnt directed at anyone (whistles)

 

[lhgpoobaa]

*pokes out tongue in return*


Question: with the 735 chipset does it allow you to run the memory asynchronously 133/166?
I cant remember

<b>Just because someone's a member of an ethnic minority doesn't mean they're not a nasty small-minded little jerk. <i>Terry Pratchett</i></b>