Hi. From Tom's Hardware guide and others. I run seti on my home computer. The Search for ExtraTerrestrial(terrestrial?) Intelligence which might once in awhile do a search on a subject and then post.
BIOS Tuning: Maximum Power
CAS Latency: Major Effect, Continued
Useful information: A memory module at 133 MHz clock in CL2 mode is faster than an overclocked module operating at 150 MHz in CL3 mode!
The "SDRAM Cycle Time" also affects the memory performance.
Enabling the "All banks" option only produces a marginal change in performance.
The following pictures show the various features that can be adjusted in the BIOS's "Chipset Functions" menu.
The "USWC" option enables the write cache of the video memory and produces slight performance increases in conjunction with state-of-the-art graphics cards.
It is not merely the memory clock (whether 100 MHz or 133 MHz) that governs the memory performance. Rather, it is the CAS latency that provides a key indicator as to how fast the memory can be accessed (latency!). Most older or cheap memory modules can often only be operated in CL3 mode (CAS latency = 3). These memories mostly do not feature an EEPROM chip, which is read out from the motherboard's BIOS. The EEPROM chip, which is found on every state-of-the-art memory module, is used for storing important data like CAS latency. Nevertheless, it is possible to access the memory with shorter latency cycles than the factory-defined ones. By way of illustration, it poses no problem for many CL3 modules (or CL 2.5 DDR-modules) to be operated with a CAS latency of 2. This operating mode does not work with all modules - trial and error is the only solution here.
The picture looks entirely different, however, if the BIOS reads out or interprets the data from the EEPROM incorrectly. In such cases, it can happen that a CL2 module (at 100 MHz or 133 MHz memory speed) is operated in CL3 mode, with the result that the performance drops by 5 percent or more.
CAS Latency: What Is It, and How Does It Impact Performance?
This is the question the RAM Guy gets asked more than any other question. So, I figured I'd put together a bulletin containing my $0.02 worth!
First of all, what is CAS?
"CAS" is short for "Column Address Strobe". A DRAM memory can be thought of as a matrix, kind of like a spreadsheet with memory cells instead of numbers and formulas. Like the spreadsheet, each cell has a row address and a column address (like "AA57" or "R23C34" in the spreadsheet). As you might have guessed, there is also a RAS signal, which is shorthand for "Row Address Strobe".
And, what do you mean by "latency"?
Latency refers to the time that you are waiting to get what you need. Merriam-Webster dictionary defines it as "the interval between stimulus and response".
Now, how does CAS work?
To understand this let's walk through a simplified version of how the memory controller actually reads the memory. First, the chip set accesses the ROW of the memory matrix by putting an address on the memory's address pins and activating the RAS signal. Then, we have to wait a few clock cycles (known as RAS-to-CAS Delay). Then, the column address is put on the address pins, and the CAS signal is activated, to access the correct COLUMN of the memory matrix. Then, we wait a few clock cycles -- THIS IS KNOWN AS CAS LATENCY! -- and then the data appears on the pins of the RAM.
So, for CAS-2 you wait 2 clock cycles and for CAS-3 you wait 3 clock cycles?
Bingo!
So, CAS-2 is 33% faster than CAS-3?
Whoa, not so fast! There are a LOT of other factors in the memory performance. Here are a few of the main ones:
„h Sometimes you have to move to a different row in memory. This means activating RAS, waiting RAS-to-CAS delay, then doing the CAS latency thing.
„h Other times, you do a "burst" read, when you pull in a lot of data in one big block. In that case, CAS is only activated ONCE, at the beginning of the burst.
„h Also, don't forget the most important thing: processors have big caches! The cache is where the processor stores recently accessed instructions and data. The cache "hit rate", i.e., the percentage of times the processor finds the information it needs in its own cache, is typically greater than 95%!
OK, OK, so what's the bottom line?
So, the bottom line is, moving from CAS-3 to CAS-2 will offer a percentage performance increase in the low single digits for most applications. Programs which are known to be memory intensive (you gamers might know of some...) will see the best improvement.
The other thing to keep in mind is that CAS-2 memory will run FASTER ( some review sites have taken it to 160MHz!) than CAS-3 memory. So, if you're thinking of overclocking your system (now or in the future), CAS-2 is your best bet for speed and stability.
So, the Ram Guy sez...
Buy CAS-2 if [1] you want to wring the last bit of performance out of your system, or [2] you're thinking of overclocking, either now or in the future, or [3] it costs the same as CAS-3, which it sometimes does...
Otherwise, CAS-3 memory should meet your requirements
Go to Ask the Ram Guy if you have questions or comments!
Friday, February 14, 2003 Registered Users: 37939, Online: 295 Have a tech question?
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RAM Technology Primer: CAS Latency
Article Date: Sep 22, 1999
By: Heidi Monson
--------------------------------------------------------------------------------
Recently, RAM manufacturers have bandied about the terms CAS Latency, CAS2, and CAS3 with great relish. They make it sound like CAS2 is a huge improvement over CAS3. Is it, or is it mainly hype? For that matter, what on earth is it?
Simply put, CAS Latency is a number that refers to the ratio - rounded to the next higher whole number - between column access time and the clock cycle time. It is derived from dividing the column access time by the clock frequency, and raising the result to the next whole number. This formula is:
CL >= tCAC / tCLK
Where:
CL is CAS Latency.
tCAC is Column Access Time.
tCLK is Length of Clock Cycle.
For example, if the tCAC is 20 nanoseconds and the tCLK is 10 ns. (as with a 100 Mhz. bus), then the CL must be 2. However, if tCAC is 25 ns., then CL must be 3, since 25/10 = 2.5.
SDRAM Basics
So, what does all this mean? To understand, we need to get into other memory timing factors. First, an introduction to a few more terms:
RAS* - Row Access Strobe
CAS* - Column Access Strobe
tRCD - Time between RAS and CAS access.
tRP - Time to switch between memory banks.
tAC - Time to prepare for output.
*RAS and CAS are normally written with a line across the top.
The SDRAM basics of how data is transferred from memory to the CPU are as follows:
The CPU sends a signal specifying the memory row and bank that it wants to access via the RAS line.
After a specific period of time (tRCD) the CPU sends a signal on the CAS line, specifying the column it wants to access.
After tCAC (column access time) the data moves to the output line, from where it is transferred with the next clock tick.
The CPU expects the data to appear upon a specific clock tick after sending the request.
In PC100 SDRAM, this process takes about 50 ns. for the first transfer. However, in burst mode it takes only one clock cycle for the next three, or if a different column is required, the time required by tCAC (CAS Latency).
CAS Latency Specifics
To keep things as simple as possible, the clock cycle referred to in this article (unless otherwise specified) is based on a 100 megahertz bus. Since the clock cycle is the inverse of the bus speed, it is defined here as 10 nanoseconds. On a 100 Mhz. bus, data transfer takes about 2 ns. According to specification, tAC is 6 ns. It takes about 2 ns. for the signal to stabilize.
6 ns. (tAC) + 2 ns. (stabilization time) = 8 ns.
8 ns. + 2 ns. (transfer time) = 10 ns. = 1 clock tick
Thus, in burst mode (the three data transfers after the first one requiring 50 ns.) data can be transferred in one clock cycle.
Often, SDRAM modules are defined by three numbers, such as 2-2-2 or 3-2-2. The first number refers to CAS Latency, the second to tRP, and the third to tRCD. Note that these numbers mean different things for different bus speeds. Following is an example of calculating these numbers for 100 Mhz. (1 clock cycle = 10 ns.):
tCAC = 25 ns. 25 / 10 = 2.5 - round up to 3 3-2-2
tRP = 20 ns. 20 / 10 = 2
tRCD = 20 ns. 20 / 10 = 2
However, if these figures were calculated at 133 Mhz. (1 clock cycle = 7.5 ns.), the results would be:
tCAC = 25 ns. 25 / 7.5 = 3.33 - round up to 4 4-3-3
tRP = 20 ns. 20 / 7.5 = 2.67 - round up to 3
tRCD = 20 ns. 20 / 7.5 = 2.67 - round up to 3
As you can see, the second example would not be valid in a 133 Mhz. system, as a CAS Latency of 4 is not allowed in the SDRAM specification.
With all the hype about CAS Latency, usually written as CAS2 or CAS3, just how important is it? In general, the importance is nominal. CAS3 means, at 100 Mhz., that the amount of time required for the first memory access in a burst is increased by less than 10 ns. Divide that by 4, to average the increased time across four bursts, and you have an improvement of less than 2.5 ns. over CAS2. However, if you are considering overclocking the bus, then it could be critical.
CAS Latency and Overclocking
To overclock the bus, you must be sure that the memory can handle it. In this case, you¡¦ll need to make assumptions about tCAC, unless the manufacturer provides it, which is highly unlikely. You can, however, infer it from tCLK, as defined by the bus speed, and the CAS Latency of the SDRAM. Take, for example, SDRAM with CAS Latency of 2 on a 66 Mhz. board.
1 / 66,000,000 hz. = 15.1 ns.
CL >= tCAC / tCLK
2 >= tCAC / 15.1 ns.
tCAC <= 30.2 ns.
Because the SDRAM specification calls for a maximum CAS Latency of 3, the worst-case scenario for overclocking to 83 Mhz. is:
1 / 83,000,000 hz. = 12.0 ns.
3 >= tCAC / 12.0 ns.
tCAC <= 36.0 ns.
Thus, in this example, the difference between the slowest possible column access time, 30.2 ns., and the maximum time allowed by the SDRAM specification, 36.0 ns., is 5.8 ns. Obviously, this isn¡¦t a large gap. If the memory module is made by a reputable manufacturer - which can generally be determined by whether the name is stamped on the module - then the odds that it is overclockable from 66 Mhz. to 83 Mhz. are good. Of course, if you can get the tCAC from the manufacturer, you can be certain.
To see some specific examples of the results of overclocking, refer to PC100 SDRAM Overclocking Comparison on SysOpt.com.
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<P ID="edit"><FONT SIZE=-1><EM>Edited by fastingsetiman on 02/14/03 08:19 PM.</EM></FONT></P>
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