Geil golden dragon is a duche with 2-2-2-11

[addiarmadar]

Tryin to finalize my report on this quirk of that geil golden dragon 3200/3500 will not do 2-2-2-11 on nf2 mobos. Really there is no difference between the stock 2-3-3-6 timmings but that 2-2-2-11 would be braggin rights. OCZ and Mushkin seems to play cool with these timmings but all the Geil I get my hands on acts like a duche with 2-2-2-11.

Does anyone else use this product and get this issue? If so could you tell me which mobo you are using? Thanks...

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[RichPLS]

Isn't 2-2-2-5 better than 2-2-2-6 which both are much better than 2-2-2-11???


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[addiarmadar]

Well in the nforce2 world, the higher precharge delay is better so 2-2-2-11 does better than 2-2-2-5 or 2-2-2-6.

This probably only implies with all ram except Geil for it is a duche with these settings. Just gotta make sure you get the ram that can do the lower timmings first.

<i><font color=red>Only an overclocker can make a computer into a convectional oven.</i></font color=red>

 

[Ned_Flanders]

you've just discovered the word "duesh" haven't you? :lol:

Do you know what a Duesh is? U'll be plesently suprised!

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[addiarmadar]

Not even going to entertain that with a proper response.

Its just a word of the month..

<i><font color=red>Only an overclocker can make a computer into a convectional oven.</i></font color=red>

 

[Crashman]

"Dusche" is German for "Shower".

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[Ned_Flanders]

A dusche is also an instrument for cleaning the woman parts :lol:

_______________________
"In the US and A there are many jobs. For Men: Accountant, Life Guard, and Sportsman. For Women...Prostitute"

 

[Crashman]

And an enama is what you use for cleaning your parts?

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[jammydodger]

A dusche is also an instrument for cleaning the woman parts

Ned I think you are old enough to use the word vagina now.

Anyway earlier in this post someone said 2-2-2-11 is fast than 2-2-2-5 or 2-2-2-6? Is this true, surely a lower precharge is better?

 

[Prof133]

Some info <A HREF="http://www.lostcircuits.com/motherboard/dfi_nfii_ultrab/5.shtml" target="_new">here</A>:

In the case of the nForce2 dual memory controllers, the situation is slightly more complicated since the two controllers can simultaneously access the different Ranks of memory. The key issue is that two pages can be accessed simultaneously but, because of the CPU interface-bottleneck only data from one controller can reach the CPU while the second controller will be in a "holding pattern" until the ongoing transfer is completed.

As a consequence, tRAS needs to be set long enough to comply with two consecutive bursts, that is a burst of 8 (four cycles) off the first controller and a burst of 4 (2 cycles) off the second controller (plus the initial access latencies). An in-detail explanation of all latency and transfer parameters involved would exceed the scope of this review but suffice it to say that if we do the math, the optimal tRAS value turns out as 11 T (using 2:3:2 latency memory), which has also empirically be found to yield the highest results. The modified "formula" is to set tRAS to tRCD + CAS delay + 6 cycles for best performance and stability.