Tom's Hardware: Topic cache sizes
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The Tbred only had one L2 cache size, 256k. The barton has 512k.
The tbred however came in two distinctly different forms, the TbredA, limited to around 1800-1900Mhz, and the TbredB, which can reach 2200 - 2500Mhz.
<b>Now can someone explain how we ever got the idea that baby bunnies lay multicolored eggs made of chocolate in our living rooms?" 
</b>
<A HREF="http://members.iinet.net.au/~lhgpoobaa/images" target="_new">http://members.iinet.net.au/~lhgpoobaa/images</A>
yep. you have to put the extra circutry for the cache somewhere! the barton is a bigger die size.
<b>Now can someone explain how we ever got the idea that baby bunnies lay multicolored eggs made of chocolate in our living rooms?" </b>
<A HREF="http://members.iinet.net.au/~lhgpoobaa/images" target="_new">http://members.iinet.net.au/~lhgpoobaa/images</A>
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