Chip Architect - Prescott Part 2

[mr_gobbledegook]

This artical from the renouned Hans de Vries from Chip Architect reckons that Yamhill is alive and well from his analysis of the Prescott die. He also reckons the need for 64bit on the desktop is required sooner than we think.

This is a very technical artical and makes for an interesting read.

<A HREF="http://www.chip-architect.com/news/2003_04_20_Looking_at_Intels_Prescott_part2.html#Yamhill shines out of the "blue"" target="_new">Looking at Intel's Prescott Die, Part II</A>

Any comments ?...

<font color=purple>Ladies and Gentlemen, its...Hammer Time !</font color=purple>

 

[reever2]

Hrm that die shot looks odd. Is 0.09 really that much smaller than 0.13? Looking at the die shot of opteron, the 1mb l2 cache takes up well over 1/2 the entire die, yet on the prescott it looks a lot smaller than one might think, actually it looks exactly double the way it looks on the p4

 

[hansdevries]

The Northwood is scaled to a "90 nm version" in all illustrations to compare it with the 90 nm Prescott.
We simply used an image editor instead of a 2 billion dollar fab :^)

Regards, Hans de Vries

 

[juin]

I do think you speculate a lot on result of a plainj image that intel have give like Nocona to have 32 KB of L1 data that a big change compare to NW

[-peep-] french

 

[hansdevries]

Maybe I should change "32k?" to "16k?" There's no way to tell
realy. From a marketing point of view they may indeed choose
the 16k to keep the 32k under wraps a little bit longer.

Regards, Hans

 

[juin]

under wrap you mean waiting for tejas or activate it when they reach 166 MHZ Fsb.

[-peep-] french

 

[eden]

It kinda surprised me, that someone here links to your article and you suddenly appear here! Or maybe I am getting the whole thing wrong.

--
This post is brought to you by Eden, on a Via Eden, in the garden of Eden.

 

[juin]

He can be found also on Aces forum and realworldtech.(please dont go at the last one)

[-peep-] french