It's a fact of CMOS manufacturing that is only going to continue to get worse.
In the past power has increased because the industry crammed more and more transistors into a smaller and smaller space. The smaller transistors burned less power as they were shrunk but designers kept adding more of them. So power gradually started to creep up. But more recently power has been increasing at an even faster rate because transistors have gotten so small that they are acting less like switches and more like leaky faucets; essentially they leak power. With each successive generation going forward (0.09um, 0.06um, etc.) it is going to get worse. A specific type of leakage called "gate leakage" increases by 10x with each successive generation. Another type called "subthreshold leakage" increases more slowly with each process shift, but it has a head start over gate leakage and so it's the bigger problem currently (pun unintended).
At 0.25um, leakage wasn't really an issue. At 0.18um, it was a minor annoyance. At 0.13um, it is a serious problem. Going forward at 0.09um, it becomes a dominant contributor to the total chip power. And it will get worse.
Design tricks can reduce it - usually with increased design complexity and usually with performance reductions. Manufacturing changes - such as using different materials like high-K gate dielectrics - can reduce it. But as transistors get smaller and smaller, they will leak more and more with each generation and there will be more effort required merely to hold power at a constant value (say, 80W as an example).
This is not a "the sky is falling" post. Moores Law is not over. But it is a fact that we are going to have to learn to live with higher and higher power processors. For what it's worth, in the global scheme of things, 100W isn't that bad. Most of my house has two-light sconces and they burn two 60W bulbs (120W total). Look at the power ratings on major applicances and you'll see that 100W isn't that bad.
Patrick Gelsinger, Intel's Chief Technology Officer, gave a great keynote speech at ISSCC (the International Solid State Circuits Conference - the largest annual chip design conference) two years ago. There's a summary here and here. It makes for interesting reading. And having attended it, I now start to feel a bit like people must have who heard Gordan Moore speak decades ago about Moores Law and then saw it happen around them.
For what's it's worth as well, having worked on a 100W+ microprocessor (the Itanium 2), I can speak with experience in saying that the problem with a 100W microprocessor isn't cooling it. It's getting power to it. Changing the numbers slightly to keep the math simple, 100W at 1V is 100 amps. And that requires serious power delivery engineering in order to deliver 100A to a CPU that is constantly changing it's current loading while holding the voltage fixed at 1V. No one is particularly worried about cooling at this stage... it's more how expensive the power regulation systems are going to get going foward.
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