Tom's Hardware > Forum > CPU & Components > CPUs > Multi-core Opteron confirmed, plus some tidbits

Multi-core Opteron confirmed, plus some tidbits

Forum CPU & Components : CPUs - Multi-core Opteron confirmed, plus some tidbits

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<A HREF="http://www.theregister.co.uk/content/61/33429.html" target="_new">http://www.theregister.co.uk/content/61/33429.html</A>

Quote :

No surprise there. Chairman Jerry Sanders, speaking at September's European Athlon 64 launch, said it's "inevitable that we'll have multiple cores on a single chip". Indeed, at the same event, his engineering colleagues revealed that the architecture on which the Athlon 64 is based - and the Athlon 64 FX and Opteron processors, for that matter - was designed from the ground up to support two cores on the same die.

The Athlon 64's on-die North Bridge today can support connections from two cores - dubbed 'CPU 0' and 'CPU 1' in AMD's documentation.



Looks like you were right BB! It should be easy to implement. Oh and gotta give pointers to Sanders. I just like the guy's aggressive attitude. Wish he still was the big guy for AMD.
Another thing, it's interesting to see how AMD is finally issuing press releases with confidence, like big companies do. I find that new and refreshing in a way. It might have to do with how they treat the server market, like other companies, by being open. It's a good thing anyways and helps their rep to spread.

Quote :

Curiously, that's the same timeframe the company is believed to have specified for the release of dual-core Opterons, suggesting that K9 is simply 'K8', the architecture on which today's Opterons and Athlon 64s are based, with the second core in place.


I don't like that one bit. That's no way to call a "new" core architecture model that. K7 to K8 was acceptable at best, but K8 to K9 with multicore is a no-no to me.

Quote :

Weber also said that AMD is exploring its own implementation of simultaneous multi-threading (SMT) technology, a technique already implemented by Intel (as HyperThreading) in Pentium and Xeon products, and soon by IBM in its Power 5 chip. Weber's Microprocessor Forum keynote acknowledged that chip designers in the future will look to multiple cores each processing multiple threads, which is probably as close to a 'we're going to do it too' statement as we're likely to get right now. When chip makers speak about the industry generically, they tend to be thinking about themselves.


To state what I had said once months ago on this one: AMD derided HT. Few months later you'll see them going: "AMD SMT is the latest breakthrough in modern technology with unrivaled logic performance that delivers unparalleled performance for the most demanding users. AMD is proud to be ahead of the race with AMD SMT!"
:wink:

Quote :

However, Weber gave no indication as to when SMT might appear in an AMD processor, or whether that chip will be K9.


I sincerly hope soon. They still got heat to spare.

--
<A HREF="http://www.lochel.com/THGC/album.html" target="_new"><font color=blue><b>This just in, over 56 no-lifers have their pics up on THGC's Photo Album! </b></font color=blue></A> :lol:

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Looks like Big Brother Big Blue is way ahead of AMD <A HREF="http:// www.theinquirer.net/?article=12145" target="_new">8 cores 144mb cache</A>. That’s one good looking package. I bet it consumes a bit more than 100w.

Dichromatic for your viewing plesure...

Reply to Schmide

Don't you feel that chip is somehow not too hot really?
I dunno, the packaging seems like it is sturdy and heat resistant as well as able to cool. Just a visual feeling.


I wanted to add, that though AMD hasn't impressed me much in the core architecture, their outside push is pretty interesting and daring. It just might be innovative. So who started the multicore desktop race?

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<A HREF="http://www.lochel.com/THGC/album.html" target="_new"><font color=blue><b>This just in, over 56 no-lifers have their pics up on THGC's Photo Album! </b></font color=blue></A> :lol:

Reply to eden

>Looks like you were right BB!

Hey, what a surprise :| When was the last time I was wrong anyway :) ?

>I don't like that one bit. That's no way to call a "new"
>core architecture model that. K7 to K8 was acceptable at
>best, but K8 to K9 with multicore is a no-no to me.

Oh this is so hmm... nonsensical. K7 to K8 was a complete remake of the chip. Sure the floorplans looked very similar, but when you'd delve a bit deeper, you'd see nearly everthing was redone from the ground up. K6 was brand new, K7 was completely new, K8 was a complete overhaul with tons of additions and novelties (SOI, HT, AMD64, Integrated MC, ..)

Now, compare that to intel. Ppro->P2->P3.. from 166 MHz to 1.4 GHz with basically the same design. From 1995 to 2003 (the P6 core still lives in mobile Celerons). Even Banias isnt too different, and is probably closer to the original PPro than hammer is to the K7.

Then, there next new core: P7 from 2000 to >2004 (prescott) still pretty much the exact same core.. just HT that has been activated and tweaked and cache improvements. Nothing any more major then eg original Athlon(forgot its code name)->tbird->palomino->barton

K8 is a great core, if indeed K9 is a copy conform with some tweaks and dual core (which I doubt), that would still be great IMHO. After all, Hammer is designed for around the 0.09 node just like the P7 core was optimized for the .13 node and the K7 for the .18 node.

>To state what I had said once months ago on this one: AMD
>derided HT. Few months later you'll see them going: "AMD
>SMT is the latest breakthrough in modern technology with
>unrivaled logic performance that delivers unparalleled
>performance for the most demanding users. AMD is proud to
>be ahead of the race with AMD SMT!"

HT is a fine technology, but its complicated and mostly benefits long pipeline designs. I doubt AMD would get anywhere near the speedups the P4 (more specifically the Xeon) enjoys. It isnt/wanst a priority for them, they went other ways to keep the pipeline filled and reduce the cost of pipeline stalls (like integrating the memory controller). When will we finally see intel include an ondie MC ? Especiaclly for the Itanium, I really don't understand why they don't

= The views stated herein are my personal views, and not necessarily the views of my wife. =

Reply to Anonymous

i think with the K9 AMD will lengthen the pipe to 20 stages... add FASTER mem controller, HT and hyper T...
dual cores running seemless with no latency hit

will be a real fast chip

AMD has got a long line of anoyances set up for intel

Reply to guesswhosback

Quote :

Oh this is so hmm... nonsensical. K7 to K8 was a complete remake of the chip. Sure the floorplans looked very similar, but when you'd delve a bit deeper, you'd see nearly everthing was redone from the ground up. K6 was brand new, K7 was completely new, K8 was a complete overhaul with tons of additions and novelties (SOI, HT, AMD64, Integrated MC, ..)

Now, compare that to intel. Ppro->P2->P3.. from 166 MHz to 1.4 GHz with basically the same design. From 1995 to 2003 (the P6 core still lives in mobile Celerons). Even Banias isnt too different, and is probably closer to the original PPro than hammer is to the K7.

Then, there next new core: P7 from 2000 to >2004 (prescott) still pretty much the exact same core.. just HT that has been activated and tweaked and cache improvements. Nothing any more major then eg original Athlon(forgot its code name)->tbird->palomino->barton

K8 is a great core, if indeed K9 is a copy conform with some tweaks and dual core (which I doubt), that would still be great IMHO. After all, Hammer is designed for around the 0.09 node just like the P7 core was optimized for the .13 node and the K7 for the .18 node.


"sigh", you're entitled to your view I guess... :eek:

Quote :

HT is a fine technology, but its complicated and mostly benefits long pipeline designs. I doubt AMD would get anywhere near the speedups the P4 (more specifically the Xeon) enjoys.


How do you figure?
HT is most certainly better suited for the K8. The ability to have such a fast transfer of data to the core, but most importantly, the amount of IPC it has, is most optimum. AMD will have to work hard improving the prefetching first, but HT is almost guaranteed to run better on the K8. Mainly because of the IPC amount. Out of the 9, an average would be 2-3 per clock. There was a report on encoding which revealed the P4 with SSE2 was doing about 0.5 IPC, and the Athlon a bit more.
I have no doubt HT is something, that if well optimized for, can do wonders on the K8 design. But it'd likely increase heat too much.


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<A HREF="http://www.lochel.com/THGC/album.html" target="_new"><font color=blue><b>This just in, over 56 no-lifers have their pics up on THGC's Photo Album! </b></font color=blue></A> :lol:

Reply to eden

I dont get this multi core madness.

They just want smaller core and bigger cache to hide there old ISA probleme

I dont like french test

Reply to juin

Juin!
Welcome back!
I thought you said you wouldn't come back. Heheh, if Spud isn't here to make the Intel PR, there's always you man.

So I am wondering here, what are your thoughts on all this? Did the Athlon 64 FX surprise you? And Intel's troubles lately?
What do you foresee?

--
<A HREF="http://www.lochel.com/THGC/album.html" target="_new"><font color=blue><b>This just in, over 56 no-lifers have their pics up on THGC's Photo Album! </b></font color=blue></A> :lol:

Reply to eden

To state what I had said once months ago on this one: AMD derided HT. Few months later you'll see them going: "AMD SMT is the latest breakthrough in modern technology with unrivaled logic performance that delivers unparalleled performance for the most demanding users. AMD is proud to be ahead of the race with AMD SMT!"

True there were 2 team that have develop a SMT impletation Ht as we know it more a feature that anything else and Alpha Ev8 team start in the early 90.Now alpha team is own by intel.Also in the same time intel and alpha was starting to work on multiple register set alpha Ev7 wa having a part of this itanium have something similar all big breaktrought come from intel and alpha.Now bolt own by the same corporation.Intel will be the last multicore and itanium will be the last mark my word.My guess is AMD will go multicore on opteron and move to SMT on K9.I dont expect much delay on K9 cuz there wont be much upgrade in K8 core as the core is allready way old.

I dont like french test

Reply to juin

Thank you

Athlon FX performe well in game.

Windows 64 bit home useur will no be here for a while.Strangely i was right.

Windows 64 cost in the 5 number like itanium version but windows 2003 is made for SMT and itanium in mind from the begining.Also in the same time they will have Fx32 for itanium for X86 emulation.

Prescott wont be delay and yes power consumation will be high starting around 88 watt about and finishing around 130 at 4.? GHZ

Athlon 64/Fx/Opteron cannot go much faster that 2.4 ghz like i have predict.

Intel are releasing server core to the mass market to reducing there price on the real server line.

The xeon ligne is getting old they wont be able to last long if nocona dont show is face around 2004 Q1.

I dont see much probleme at intel or AMD.everyting is fine as long as itanium ligne continue to grow for intel and as long as K9 is release before 2006 Q2 where nephalem should be close to release..The question is does intel will want a faster architecture or just some thing to make competition.

On top 500 super computer most of new entry supercomputer are itanium ligne and performing really good at 75% of the max teraflop not like big blue or any others.The rest are Xeon ligne.I still do not see the big 40 teraflop computer from AMD not even a single opteron in the top 20.I we still read article on theinquirer dont say that the world will buy opteron cuz jesus can be find in this chip.

I dont like french test

Reply to juin
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