Nice PDF on Opteron from AMD

http://www.linuxclustersinstitute. [...] nner_R.pdf

Slice 11 increase in Opcode of about 0.4 bit for AMD64 use.As only W take a single bit to add the prefix and from what i have read this could more.

Slice 19 That 1 thing i have dont think before and that leverage a big disaventage of DDR vs RDRAM.DDR support very few page open page and most desktop chipset dont even support the maximun number of page.As a Page miss happen the chipset must re-acces the page most of the job happen in the chipset and increase heat in chipset and increase latency.Opteron dont have a chipset so the page miss will not be see as the page will be re-access in the DRAM inter clock as the ration is about 16:1 on opteron 248 2200mghz DDR 166 mghz.With DDR2- 400 the internal clock is only 100 mghz so there will be no penality on page miss.As the ration get closer to 1:1 the penality will reappear.So on a Very high speed DDR1 266 mghz on a Athlon FX 1.8 ghz the penality is just reduce compare to I875.The effectiness of the DRAM controleur is still to be see.


1.9 flop on 64 bit mode
3.2+ flop on 32 bit mode
I guess 3.2+ flop mean SSE2 in parrelle with FPU
Itanium 2 1GHZ number
9.2 flop at 32 bit
6.4 flop at 64 or 82 i have to check also i not sure if that is a IEEE compatible precision <P ID="edit"><FONT SIZE=-1><EM>Edited by juin on 12/12/03 01:16 PM.</EM></FONT></P>