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Yamhill to be unveiled at IDF?... !!!

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January 29, 2004 9:31:46 PM

A small introduction:
Quote:
Intel plans to demonstrate a 64-bit revamp of its Xeon and Pentium processors in mid-February--an endorsement of a major rival's strategy and a troubling development for Intel's Itanium chip.

OK, here's the link... <A HREF="http://news.com.com/2100-1006_3-5150336.html?tag=nefd_t..." target="_new">Intel will unveil Yamhill at IDF.</A>
For those of you who don't want to follow the link, here is the date to wait for if you want more information on Yamhill, apparently:
Quote:
The demo, which follows the AMD64 approach of Intel foe Advanced Micro Devices, is expected at the Intel developer conference, Feb. 17 through 19 in San Francisco, according to sources familiar with the plan. Intel had code-named the technology Yamhill but now calls it CT, sources said.

:evil:  <font color=red><b>M</b></font color=red>ephistopheles

More about : yamhill unveiled idf

January 29, 2004 9:34:25 PM

Yamhill is back. Looks like it never went away.
January 29, 2004 9:37:57 PM

That hard to believe from what i have see they just got a
ALU and register on 64 bit mode far from a complete CPU.Also that not official from intel PR.I wonder how intel will deal with that.Maybe be a mistake to move too earlie to 64 bit.

I dont like french test
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January 29, 2004 10:31:55 PM

You do have good sources, juin? Contacts?... ...

:evil:  <font color=red><b>M</b></font color=red>ephistopheles
January 29, 2004 11:06:21 PM

Quote:
Yamhill is back. Looks like it never went away.

I think it looks like it never went away because it was never really here in the first place. :smile:

Yamhill is the stuff of legend in the hardware world...

:evil:  <font color=red><b>M</b></font color=red>ephistopheles
January 30, 2004 8:06:12 AM

Yamill brings to mind a young bespectacled jewish boy, slaving over a torah.
Anonymous
a b à CPUs
January 30, 2004 8:19:01 AM

Don't dispair. Intel will not call it Yamhill, but CT (cloned technology). Im not kidding.

= The views stated herein are my personal views, and not necessarily the views of my wife. =
January 30, 2004 8:28:58 AM

you read too much at aces

I dont like french test
January 30, 2004 8:29:19 AM

The worse is all AMD is a copy of intel

I dont like french test
January 30, 2004 8:54:12 AM

Crypes there are people up at this time... Im just going to work, its 4am here what time is it where you guys are?

-taitertot

If this post has attitude, seems to be overly aggressive, rude, distasteful to 99% of the users here, and shows a zealous defense of Intel... It’s probably Spud.
January 30, 2004 8:59:36 AM

Well actually, intel designed the first cpu to someone elses specs, but Amd actually built the first functioning cpus.
Where exactly is the original of the x86-64
Anonymous
a b à CPUs
January 30, 2004 9:41:35 AM

>The worse is all AMD is a copy of intel

Don't be silly. Sure they used to make their living by cloning intel designs, but they are not a copy of intel; if they where, surely they would have copied all those smart ideas like RDRAM, overclocked 1.13 GHz cpu's, crappy chipsets, hollowhertz and monstreous 64 bit collector items.

Nah, instead they improved x86 with SIMD instructions (3DNow, which intel copied, changed and renamed to SSE), used Alpha bus, DDR, developped ondie memory controllers, hypertransport, SOI and AMD64.

AMD made clones up to the 486, but those days are long gone. Now its Intel's turn to clone AMD, if they are up to it..

= The views stated herein are my personal views, and not necessarily the views of my wife. =
January 30, 2004 10:11:47 AM

You should go take some history lesson.

I dont like french test
January 30, 2004 10:13:00 AM

3Dnow isnt quite SIMD and its more Integer stacking than anything. but the idea of 64bit has been cloned by AMD too since Alpha, SPARC, POWERPC and MIPS all are 64bit. AMD just added 64bit functionality to x86.

With considerations that x86's inability to retire more than 3 instructions is becomeing problematic, AMD will eventually need to move away from x86 all together to continue the IPC increase. This most likely wont occur for a few more years though.

Ondie memory controllers were initially designed by Alpha just as Hyper Threading was too. AMD and Intel just added the functionality of these technologies to their silicon. Hyper Transport is also just a tunneling technology nothing to jump up and down over. When the AGP bus is saturated it helps a great deal but on daily use its not overly "impressive".

SOI is a manufactureing process that IBM developed and now they are useing. Its not something only AMD uses or will ever use. Power PC chips are all build on SOI as well. AMD64 is just a marketing term for x86-64, you wouldnt think from someone as smart as yerself would fall to marketing terms. Just added functionality thats been around for 20 or so years, just added it to the x86 set.

Also AMD didnt make clones they physically made those CPU's for Intel, due to licenceing they were able to use them and label them as their own.

-taitertot

If this post has attitude, seems to be overly aggressive, rude, distasteful to 99% of the users here, and shows a zealous defense of Intel... It’s probably Spud.
January 30, 2004 10:21:57 AM

3Dnow isnt quite SIMD and its more Integer stacking than anything. but the idea of 64bit has been cloned by AMD too since Alpha, SPARC, POWERPC and MIPS all are 64bit. AMD just added 64bit functionality to x86

MMX was the 1 SIMD base code.AMD 64 is not even a extention is just a new mode that allow more register and larger adressing.

With considerations that x86's inability to retire more than 3 instructions is becomeing problematic, AMD will eventually need to move away from x86 all together to continue the IPC increase. This most likely wont occur for a few more years though.

In overal they never get higher that 1 instruction or 1.4 uops even with HT on.''Linpack dont count''

Ondie memory controllers were initially designed by Alpha just as Hyper Threading was too. AMD and Intel just added the functionality of these technologies to their silicon. Hyper Transport is also just a tunneling technology nothing to jump up and down over. When the AGP bus is saturated it helps a great deal but on daily use its not overly "impressive

In the same time in intel at Israel they were developing a CPU call tinma (something like that) that were featuring a memory controleur.That was before the project been cancel and move to banias.


That a big myth that IBM create SOI.It was many year ago that Intel and IBM have start developing those technologie.Also it been year that IBM work on strained sillicon.It was just a question of what you need the most.

I dont like french test
January 30, 2004 10:31:53 AM

MMX theorectically was SIMD but it doesnt mean when you coded for it, that it behaved like SSE or SSE2. MMX could take 2x32 Int and FP calls in stack, but the cycles it took to do the FP were almost 3x worse last I checked. Hnce the creation of SSE.

True the IPC of x86 doesnt go much further than 1 but as things progess they will start to push on the barrier.

True I read than Intel didnt see the need for a ondie memory controller at the time. Reason unknown to me though, guess well see what the next few years bring us to see if they change their views on such things.

Thats true my wording was poor on that. I know IBM and Intel have joint development programs but that fact that beany made it sound like AMD is the only guys useing it cause they made it all by there lonesomes is where the reasoning for my comment. I also do believe there was Micron and Samsung in on that development as well.

-taitertot

If this post has attitude, seems to be overly aggressive, rude, distasteful to 99% of the users here, and shows a zealous defense of Intel... It’s probably Spud.
Anonymous
a b à CPUs
January 30, 2004 10:37:59 AM

>3Dnow isnt quite SIMD and its more Integer stacking than
>anything.

Okay, but so was SSE, which is pretty damn close 3DNow.

>Ondie memory controllers were initially designed by Alpha

Yeah, and before Alpha, some university professor probably wrote a whitepaper on it somewhere in the 70's. Fact is, AMD is the first to bring ondie memory controllers into the mass market, and into the x86 market.

>as Hyper Threading was too

I am not sure about that... I do think intel was first to produce a SMT chip, although as always, the idea wasnt theirs, it has been published and discussed in documents as far back as DEC, and the "inventor" was as I recall a university professor not related to intel in anyway.

>Hyper Transport is also just a tunneling technology nothing
>to jump up and down over.

It definately is something to jump up and down over. Cheap, fast P2P cpu interconnect. If there was any major new technology realised this last decade in the SMP market, I would point to hypertransport. In a single cpu system, hypertransport doesnt offer much compared to traditional FSB's, but in multi processor configurations, HT *is* revolutionary. If I where intel, I might ignore AMD64, but I would definately licence HT or make my own variant.

>SOI is a manufactureing process that IBM developed

Once more, AMD is first to bring it to massmarket. BTW, many, if not most "inventions" like this are not intel's or AMD's. They are either pioneered in different niche markets, and/or invented by specialized companies, or universities, and then licenced or perfected and brought into production. The real challenge for intel or AMD is usually is to pick the right technologies (RDRAM anyone ?) and implement them into the x86 world.

>AMD64 is just a marketing term for x86-64, you wouldnt >think from someone as smart as yerself would fall to
>marketing terms.

x86-64 is just as well a marketing term. AMD abonded it in favor of AMD64 for obvious reasons. They did invent/design/implement the ISA though, and its as nice as 64 bit x86 could get

>Also AMD didnt make clones they physically made those
>CPU's for Intel, due to licenceing they were able to use
>them and label them as their own.

What do you think cloning means ? BTW, they didnt just fab them, they didnt use intel masksets. They did use Intels design and microcode.


= The views stated herein are my personal views, and not necessarily the views of my wife. =
Anonymous
a b à CPUs
January 30, 2004 11:13:37 AM

And you should prepare for your french exam (or better yet, english). And change socks and underwear more regulary.

= The views stated herein are my personal views, and not necessarily the views of my wife. =
January 30, 2004 1:32:58 PM

True I read than Intel didnt see the need for a ondie memory controller at the time. Reason unknown to me though, guess well see what the next few years bring us to see if they change their views on such things

It OEM that have kill the cpu that was suppost to be a even cheaper cpu that celeron.

MMX theorectically was SIMD but it doesnt mean when you coded for it, that it behaved like SSE or SSE2. MMX could take 2x32 Int and FP calls in stack, but the cycles it took to do the FP were almost 3x worse last I checked. Hnce the creation of SSE.

My point was it take single instruction with multiple data with 1 fetch.So therefore intel was the 1.On FPU lantency when they say 3 time slower so time it just mean 3 or 4 cycle more as it might have take 2 cycle and 5 for FPU + front-end-WB.

Thats true my wording was poor on that. I know IBM and Intel have joint development programs but that fact that beany made it sound like AMD is the only guys useing it cause they made it all by there lonesomes is where the reasoning for my comment. I also do believe there was Micron and Samsung in on that development as well.

I dont think IBM and intel have co-developement on anything by now as they are in direct competition for best manufacturing ability.I have see a 0.01 micron soi DRAM 2 year on a article from a university.The good question does there a market for SOI DRAM/SRAM/GDRAM.

I dont like french test
Anonymous
a b à CPUs
January 30, 2004 7:41:32 PM

>True I read than Intel didnt see the need for a ondie
>memory controller at the time. Reason unknown to me though

It was not a matter of "no need". Intel was working on Timna, a ultra low cost, highly integrated chip, designed to compete with Cyrix MediaGX which was doing pretty well back then, and threatening celeron sales.

Based on a P3 core, it had a ondie northbridge, and if I'm not mistaken, even a (basic) GPU, and provisions for southbridge features like sound, LAN and just about everything. 'SOC' was the buzzword, 'system on a chip'. The idea was to be able to build dirt cheap (<<$500) systems around it. What nuked the project was simple: they designed Timna for RDRAM.. ouch..

I think that catastrophic decission made them rather nervous about cementing a cpu architecture with a RAM standard (like K8 is married with DDR), and may explain why we havent seen an integrated memory controller yet from Intel.

= The views stated herein are my personal views, and not necessarily the views of my wife. =
January 30, 2004 8:16:19 PM

Everyone was suppost to move to RDRAM that was a logic.

I dont like french test
Anonymous
a b à CPUs
January 30, 2004 8:58:32 PM

Yes, thank you Juin, for pointing out the obvious.

= The views stated herein are my personal views, and not necessarily the views of my wife. =
January 31, 2004 12:27:29 AM

wouldnt intel have less to gain from an on die memory controller...i always thought with the a64 the only reason for a significant gain was because of amds inferior prefetch logic...


If it isn't a P6 then it isn't a procesor
110% BX fanboy
January 31, 2004 1:31:43 AM

The K7 core dont gain from anything the 512 KB L2 in newcastle decrease performe by only few %.The A64 3400+ is only few % slower that FX51 even most reviewer as tell Athlon FX is useless by now as a A64 is almost as fast and can about 500$ dollar less (mobo register memory).Lantency affect it badly so a intergrade controleur show good yield.Once again if you took normal review like anandtech toms or any others 3/4 of there benchmark are game that not really realistic therefore not show the realitie.

Possible reason OoO logic,prefetch,lack of ILP.

I dont like french test
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