Why doesn't anyone make/use QBM sdram?

[BlackLoTuS]

Anyone ever heard of quadband memory? A company called Kentron http://www.kentrontech.com developed it. It uses standard DDR sdram with a small controller for each 2 chips that shifts the signal 90 degrees for the second chip. Anyways, you get 2x the bandwidth off of the same DDR sdram we use today. Its completly pin compatible and backward compatible with 184 pin ddr, unlike DDR2 that will be 240 pins and have much higher latency. All you need is a memory controller that supports QBM and then you can use either standard DDR or QBM for 2x the bandwidth. QBM modules are only supposed to cost like $15 more.

I guess some of Via's chipsets already support this but I was wondering why no one else has jumped on it considering that it's actually been around a little while, is fully backward compatible, retains low latency and the company supposedly licences the technology for free! I think this would really help for P4 chipset only requiring 1 channel or especially if AMD were to include support in the A64 for this. Sadly, I'm pretty sure AMD won't change the memory controller for a while but that seems like the best direction to move because they can get 2x the bandwidth without the higher latencies of DDR2 which would kill the low latency advantage of the on die memory controller.

That would seem like a painless upgrade route. Plus it seems that DDR2 yeilds are likely to reamain pretty low for a while (EXPENSIVE).

 

[Spitfire_x86]

QBM is not a industry standard yet

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[P4Man]

I've been wondering about that too. I'm sure there is a catch, but I don't know what it is either...

= The views stated herein are my personal views, and not necessarily the views of my wife. =

 

[BlackLoTuS]

Sure its not a standard but Intel pushed DDR3200 before it was officially ratified. If the company licenses it for free would it not make sense for some bigger companie's Intel, AMD to include support since its licensed for free and backward compatible with standard DDR?

 

[DeEvolution]

I think that it has to do with stability from noise. How many single channel DDR400 motherboards cannot even run four DIMMs? As far as I understand it the reason is because of signal noise along that rather long path between the actual sticks of RAM and the memory controller.

DDR2 supposedly includes in its design measures to correct this. (Which is quite possibly why it has a longer latency.) Perhaps QBM just does not provide enough stability at high clock speeds and fast memory timings when three or four sticks of RAM are involved to satisfy either Intel or AMD.

Besides, does any (stock) processor need more bandwidth than dual channel DDR400 can provide? If bandwidth was a concern we would see <A HREF="http://www.rambus.com/products/xdr/xdrdramformainmemory/direct.cfm" target="_new">solutions from Rambus</A>. As a litigious company I detest Rambus. As an innovator of high bandwidth memory solutions however they are difficult to beat. A 1.2V 64bit 6.4GHz XDR memory system could deliver 50GB/sec. Because such is not being produced and used I can only imagine that bandwidth must not be a concern to the computer industry.

I think it is simply that we have what we need. There is just no need to implement something better.


"Sad is the elephant upon the ice who went to put on his wooly coat only to realize that he left it in his other trunk." - DeEvolution