Intel 2-Core "Smithfield": desktop CPU by mid-2005

Apparently, Intel's new dual-core CPUs will debut in mid-2005 in <i>desktops</i>. This is important because AMD only plans to introduce the dual-core Toledo as a server/workstation part, but without a mainstream dual-core solution. The article is <A HREF="http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2144" target="_new">here</A>
Quote:

Intel's dual core approach looks extremely promising as they anticipate launching directly on the desktop with the Glenwood and Lakeport platforms. According to the roadmap, Intel states that two of the Smithfields will launch as mainstream processors, while an additional processor SKU will be positioned as a performance processor. All three processors will launch on the LGA775 socket. Unfortunately, details are still light at this time. As to whether or not the much rumored Tejas New Instructions (TNI) shall show up in Smithfield will remain something we cannot confirm or deny just yet.

Because of the LGA775 socket, this future dual-core desktop processor should have 1066Mhz FSB, and support DDR2-667 or DDR2-800, by then... If EM64T is ironed out by then, then Intel could have an edge... And get out of this pathetic state they're in right now.

What they really needed to do is revamp the whole system as in the architectural sense, not just speed/clock rates... For instance, the dual-core xeon could use two individual 800Mhz FSBs, not shared, for a total of 12.8GB/s to pair with dual-channel DDR2-800 or something... But they've stated that the dual-core solutions will utilize an "arbiter" chip, which is obviously an indication that the FSB will still be shared at a chip level... Which is kind of disappointing, unless the FSB was suddenly doubled to 1600Mhz (or at least 1333Mhz)... Bandwidth-starved Xeons at 3+Ghz are already common...

Of course, ideally, Intel could also get away with northbridge altogether too... or come up with something better (i.e. faster).

After all, <i>never fear, smith(field) is here!</i> Right, Intel?...

<i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i><P ID="edit"><FONT SIZE=-1><EM>Edited by Mephistopheles on 08/03/04 00:20 AM.</EM></FONT></P>
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  1. Right now it's hard to believe that it's looking "promising". They can't even get a single core prescot is run at decent temps with .09 processing. Could you imagine what it'll be like with 2 cores?
    Your going to have to stick your computer inside of a fridge.

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  2. If this happens and AMD doesn't have a solution that's better then I will switch to intel again. Mid-2005 though? Not with Intel's track record. Its begining to look alot like Christmas?

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  3. I wonder if they'd go dothan for that?... Something in the lines of two 2.13Ghz Dothans with 533Mhz FSB each, to a total of 1066Mhz FSB?...

    The problem with prescott isn't the process itself, it's the extra transistors. It's like prescott has twice (actually, even more) the logical transistors that NW had... So at least the average heat per transistor has decreased dramatically (or we'd have a 170~180W processor...) If they used a tweaked Northwood core or a dothan, then it'd be possible to go dual core easily. But using a prescott at 90nm is not so easy...

    There's still something else to consider, though: heat is being dissipated by the whole surface. It's much easier to dissipate 200W over 200mm^2 than 200W over 100mm^2; that's a fundamental advantage of dual core: the thermal density (W/mm^2) is unchanged.

    If they can share cache (2MB total), then the heat output would diminish a bit. But granted, dual core prescott isn't the brightest of the possibilities Intel has on its hands.

    <i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i>
  4. speaking of dothans, Only if intel would consider making dothans for desktop. That would be about the only thing to save intel's ass right now.
    It's a shame someone hasn't figured out how to make something that would get a p-m to run on a 478socket mobo. It's the same amount of pins just in a different array. I'm sure it's possible. But then you'd have to have bios that would support it.

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  5. i have to say that lately, i trust amd's product launch dates then intel's. if amd does get 90nm out before the end of the 3rd quarter that will just make it more apperent to me anyway.

    intel had an early set back that is working its way down the complete line, i just dont see where the pull out dual core by 2H '05 for ALL lines, not just servers. but i do agree it is about all they have left to take an agressive stab at amd. although i have a feeling amd could pull out dual core very close to intel if it came right down to it. they have had the idea for quite a while, and its possible thier announcement was meant as 'as the market demands' just as intel said it would not go 64bit so soon, yet here they are, jumping in. amd could be ready, but they may wait as long as they can, letting intel start the ball.
  6. according to anandtech, Smithfield is tejas renamed. meaning that dual core netburst will be intel's flagship processors. tejas didn't die, it was only renamed. Long live netburst architecture!

    <A HREF="http://forums.amd.com/index.php?showtopic=20316&st=0" target="_new">Thread at amdforums</A>

    <A HREF="http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2118" target="_new">Intel roadmaps</A>

    <A HREF="http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2144" target="_new">Link to source</A>

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  7. I'm looking forward to it. And i agree i hope it's dual core dothans.
    Although i'd rather use AMD since i'm L337. But.. for the I that is me.. whichever i feel is better i will go to.

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  8. Quote:
    There's still something else to consider, though: heat is being dissipated by the whole surface. It's much easier to dissipate 200W over 200mm^2 than 200W over 100mm^2; that's a fundamental advantage of dual core: the thermal density (W/mm^2) is unchanged.


    I think you mean W/mm^3. Dual-core designs have traditionally been "stacked", so the surface area contacting the heatsink remains the same while heat and power consumption doubles (at least, for the core itself). Unless they do something like IBM with Power5, introducing cores on separate parts of the package, but that's expensive.

    "We are Microsoft, resistance is futile." - Bill Gates, 2015.
  9. >I think you mean W/mm^3. Dual-core designs have
    >traditionally been "stacked"

    Excuse me ? Can you point me to a link to confirm this ? Every single die picture or diagram i've seen on dual core PA Riscs, Power cpu's, Itaniums or opterons all show the two cores next to each other. Sometimes mirrored, sometimes not, but I've *never* seen a stacked dual core. That would be *really* hard to cool and to fab. Current AMD cpu's use something like 9 or 10 layers or so, can you imagine doubling that ? I think you are mistaken here..

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  10. Quote:
    I think you mean W/mm^3. Dual-core designs have traditionally been "stacked",

    Oh, I didn't know that...

    Also, it would obviously be better not to stack the two prescott cores, wouldn't it?... for heat dissipation...

    <i>Edit</i>: Agreed, P4Man, I can't ever recall reading about stacked dual-core solutions... I do vaguely remember seeing two cores side-by-side, though.

    <i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i><P ID="edit"><FONT SIZE=-1><EM>Edited by Mephistopheles on 08/03/04 09:01 PM.</EM></FONT></P>
  11. "Smithfield" sure sounds like a mainstream cpu to me, will they call the chipset Joeville ? :)

    Anyway, I'm curious.. dual core is nice and I'm looking forward to it, but not at the expense of single threaded performance. If they can manage two cores AND competitive single threaded performance (like not more than ~15% slower than existing/competing products), I'll be very interested.

    On the Dothan vs Prescott question: my guess is it will unfortunately be a netburst core (prescott based). I just don't think we will be seeing 64 bit Dothans that fast.

    As for heat.. well.. a year gives intel some time to improve in that regard, but I highly doubt these chips will clock as high as single cored P4s. Prescott seems entirely power limited, so at any thermal/power enveloppe you'd expect a single core to clock significantly higher. Maybe the real reason behind the numbering scheme ? IOW, I fear single threaded performance will suffer, we'll get new versions of Sysmark, and once again a few years of waiting for software to catch on. As with most things from intel, early adopters may not be rewarded.

    Oh, and try not to be too blinded by those FSB speeds and DDR2 speeds. Sure it makes a difference, but really not all that much. Those increases are just enough to keep roughly the same cpu speed/IO speed ratio as today, and considering a dual core chip is likely a whole lot more IO hungry, it won't miraculously boost performance.

    >or instance, the dual-core xeon could use two individual
    >800Mhz FSBs, not shared,

    Won't happen. It would be close to impossible to design a motherboard that could handle two synchronous 800 MHz FSB's per chip, 4 of them for a dual board. Its already extremely hard to do one (main reason Xeon's FSB stayed at 533 for so long). Nah, intel needs some P2P like opteron IMHO, even though FB-DIMM might resolve some of the issues (like bandwith per pin/trace)

    = The views stated herein are my personal views, and not necessarily the views of my wife. =<P ID="edit"><FONT SIZE=-1><EM>Edited by P4man on 08/03/04 06:42 PM.</EM></FONT></P>
  12. the K8 family was designed right from the very start with dual core capability in mind. the 2 cores will communicate via hypertransport links on the die, each has its own memorey controller and path to memory hence no shared resources that you will get with dual core P4's
  13. ah yes i remember reading that! I need to learn more about this hyper transport ...how its different from a standard front side bus

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  14. will there be any chance the Dual P4's will have on die memory controlers? and will intel be able to use hyper transport or is it an non-intel thing?
  15. True, but actually, the problem in itself isn't actually the sharing of resources, but rather the lack thereof when sharing. Hence, a dual-core P4 with a 1600Mhz FSB isn't a problem, because it really has twice the resources than a standard P4... Even if the two CPUs share the faster bus... A shared bus for xeons is bad because there are two CPUs with ONE 533 or 800Mhz bus, while on P4s you'd have ONE CPU with ONE 533 or 800Mhz bus... So in a very crude manner of speaking, the total available traffic for each CPU is halved.

    This is a problem Intel will probably have to deal with if they intend to make a truly great dual-core CPU. Either increase FSB or do something else. Like HT...

    <i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i>
  16. Quote:
    will there be any chance the Dual P4's will have on die memory controlers?

    It is conceivable, but at this point in time I personally think it's unlikely. Unless they truly haste its development...
    Quote:
    and will intel be able to use hyper transport or is it an non-intel thing?

    I think it's an open consortium, and Intel could use that technology. I think that that technology-sharing (cross-licensing or something) agreement that both Intel and AMD signed is even applicable here, making HT specs accessible to Intel...


    <i><font color=red>You never change the existing reality by fighting it. Instead, create a new model that makes the old one obsolete</font color=red> - Buckminster Fuller </i><P ID="edit"><FONT SIZE=-1><EM>Edited by Mephistopheles on 08/04/04 06:12 PM.</EM></FONT></P>
  17. sounds to me intel haven't changed then. If things don't improve with the games. I'm going to change over to amd.
  18. > think it's an open consortium, and Intel could use that
    >technology

    AFAIK, HT is an open spec, but you need a licence anyhow. And cache coherent HT (needed for the cpu's, not just the chipsets) is not open at all, maybe licenceable, but I doubt AMD will give it for free (if at all).

    >I think that that technology-sharing (cross-licensing or
    >something) agreement that both Intel and AMD signed is even
    >applicable here,

    Definately not.

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  19. intel could make there own version of HT. like they did with NX an XD.
  20. Well yes and no. Sure, intel could make its own cpu interconnect protocol a la HTT, its not like they are too dumb to do that (even though it would take time), but no, they could not jus take HTT and rename it like they did with AMD64/NX. AFAIK, intel and amd have an agreement that enables them to use each others x86 instruction set extentions (MMX, SSE, AMD64, NX, ..). In fact, AMD pays for that, but that agreement surely does NOT extend beyond that, let alone CPU interfaces or interconnects.

    Now wether or not AMD would allow them to use it, I don't know. It could provide benefits for AMD as well (compatibility with future intel chipsets again, that sure would be nice), but intel can't just clone it without AMD's consent, not this one.

    = The views stated herein are my personal views, and not necessarily the views of my wife. =
  21. I'm not so sure about that. Seems to me, I remember reading that sis was working on a system bus for P4s that was very close to HTT. Then it might be more of a board function, rather than a cpu.
  22. Probably NB->SB link, which could even be HTT (like on the nForce2), but what you read probably referred to Mutuol or whatever SiS calls it NB/SB link. Sis really can't design a NB->CPU (FSB) interface on its own, it takes two to tango.

    = The views stated herein are my personal views, and not necessarily the views of my wife. =
  23. is it likly intel will intergrate a on-die memory contoller on the smithfield?
  24. >Is it likly intel will intergrate a on-die memory contoller
    >on the smithfield?

    Very, very unlikely. Almost certainly not. S775 doesn't have enough reserved pins to connect to the RAM. Also, intel has said on numerous occasions they have no plans to move the memory controller ondie. Intel thinks its performance advantages do not outweigh the disadvantages (less flexibility, possibly clockscaling issues). They have tried it once with Tinma (cheap, system-on-chip Celeron variant), and got burnt badly since they chose RDRAM for ODMC. I don't see them trying again anytime soon.

    = The views stated herein are my personal views, and not necessarily the views of my wife. =
  25. Quote:
    but intel can't just clone it without AMD's consent, not this one.

    That's completely incorrect. Anyone can legally reverse engineer a product. (Well, except for reverse engineering encryption algorithms, which according to laws like the DCMA becomes a state of indererminate legal standing.) So Intel very well <i>could</i> reverse engineer the technology.

    What Intel could not however do is use that technology's names and patented methods without a license. (But considering how easy it is to provide the same functionality with a different method, no method patent would pose a significant problem in reverse engineering the functionality.)

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  26. There is no need to reverse engineer it, all the specs and docs are available. You can reverse engineer whatever you like, but that doesn't give you the right to clone it. Why do you think VIA/nVidia would need a licence to prodice chipsets for the Pentium 4 bus, since according to you they can legally reverse engineer it ? Same thing.

    = The views stated herein are my personal views, and not necessarily the views of my wife. =
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